Lines Matching refs:lsr
208 uint32_t line_err_status = (regs->lsr & BSETS_UART_LSR_ERROR); in sedi_dma_event_cb()
227 while (!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED))) { in sedi_dma_event_cb()
305 while (!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED))) { in io_vec_write_callback()
372 uint32_t lsr = regs->lsr; in handle_unsol_rx_data() local
377 while (lsr & SEDI_RBFVM(UART, LSR, DR, READY)) { in handle_unsol_rx_data()
383 lsr = regs->lsr; in handle_unsol_rx_data()
494 uint32_t lsr = regs->lsr; in sedi_uart_isr_handler() local
505 if (lsr & status_report_mask[uart]) { in sedi_uart_isr_handler()
513 lsr & BSETS_UART_LSR_ERROR, 0); in sedi_uart_isr_handler()
518 if (lsr & SEDI_RBFVM(UART, LSR, DR, READY)) { in sedi_uart_isr_handler()
552 regs->lsr & (SEDI_RBFVM(UART, LSR, ADDR_RCVD, 1) | BSETS_UART_LSR_ERROR); in sedi_uart_isr_handler()
647 unused_lsr = regs->lsr; in sedi_uart_set_config()
661 uint32_t lsr = regs->lsr; in sedi_uart_get_status() local
664 lsr & (SEDI_RBFVM(UART, LSR, OE, OVER_RUN_ERROR) | in sedi_uart_get_status()
675 } else if (!(lsr & (SEDI_RBFVM(UART, LSR, TEMT, ENABLED)))) { in sedi_uart_get_status()
679 if (lsr & SEDI_RBFVM(UART, LSR, DR, READY)) { in sedi_uart_get_status()
696 while (!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED))) { in sedi_uart_write()
701 while (!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED))) { in sedi_uart_write()
718 uint32_t lsr = regs->lsr; in sedi_uart_read() local
720 while (!(lsr & SEDI_RBFVM(UART, LSR, DR, READY))) { in sedi_uart_read()
721 lsr = regs->lsr; in sedi_uart_read()
724 if (lsr & status_report_mask[uart]) { in sedi_uart_read()
726 *status = (lsr & BSETS_UART_LSR_ERROR); in sedi_uart_read()
785 while (regs->lsr & SEDI_RBFVM(UART, LSR, THRE, ENABLED)) { in sedi_uart_write_buffer()
791 while (!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED))) { in sedi_uart_write_buffer()
812 uint32_t lsr = 0; in sedi_uart_read_buffer() local
815 while (!(lsr & SEDI_RBFVM(UART, LSR, DR, READY))) { in sedi_uart_read_buffer()
816 lsr = regs->lsr; in sedi_uart_read_buffer()
819 *status = (lsr & status_report_mask[uart]); in sedi_uart_read_buffer()
827 lsr = 0; in sedi_uart_read_buffer()
1027 regs->lsr; in sedi_uart_rs485_enable()
1155 while (!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED))) { in sedi_uart_9bit_send_address()
1205 uint32_t lsr = regs->lsr; in sedi_uart_read_rx_fifo() local
1208 if (!(lsr & SEDI_RBFVM(UART, LSR, DR, READY))) { in sedi_uart_read_rx_fifo()
1212 while (lsr & SEDI_RBFVM(UART, LSR, DR, READY)) { in sedi_uart_read_rx_fifo()
1213 if (lsr & status_report_mask[uart]) { in sedi_uart_read_rx_fifo()
1218 lsr = regs->lsr; in sedi_uart_read_rx_fifo()
1330 return !!(SEDI_UART[uart]->lsr & SEDI_RBFVM(UART, LSR, THRE, ENABLED)); in is_tx_fifo_full()
1343 return SEDI_UART[uart]->lsr & SEDI_RBFVM(UART, LSR, DR, READY); in sedi_is_rx_data_available()
1402 return !!(SEDI_UART[uart]->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED)); in sedi_uart_is_tx_complete()
1974 while (!(regs->lsr & SEDI_RBFVM(UART, LSR, TEMT, ENABLED))) { in sedi_uart_dma_io_polled()
2099 *status = regs->lsr & BSETS_UART_LSR_ERROR; in sedi_uart_dma_read_polled()