Lines Matching refs:dataWidth
116 void Cy_SCB_UART_SetDataWidth(CySCB_Type *base, uint32_t dataWidth) in Cy_SCB_UART_SetDataWidth() argument
118 CY_ASSERT_L2(CY_SCB_UART_IS_DATA_WIDTH_VALID (dataWidth)); in Cy_SCB_UART_SetDataWidth()
121 Cy_SCB_SetByteMode(base, (dataWidth <= CY_SCB_BYTE_WIDTH)); in Cy_SCB_UART_SetDataWidth()
123 CY_REG32_CLR_SET(SCB_RX_CTRL(base), SCB_RX_CTRL_DATA_WIDTH, (dataWidth - 1UL)); in Cy_SCB_UART_SetDataWidth()
125 CY_REG32_CLR_SET(SCB_TX_CTRL(base), SCB_TX_CTRL_DATA_WIDTH, (dataWidth - 1UL)); in Cy_SCB_UART_SetDataWidth()
280 CY_ASSERT_L2(CY_SCB_UART_IS_DATA_WIDTH_VALID (config->dataWidth)); in Cy_SCB_UART_Init()
284 …ROC_VALID (config->enableMutliProcessorMode, config->uartMode, config->dataWidth, config->parity)… in Cy_SCB_UART_Init()
304 … _VAL2FLD(SCB_CTRL_MEM_WIDTH, ((config->dataWidth <= CY_SCB_BYTE_WIDTH)? 0UL:1UL)) | in Cy_SCB_UART_Init()
309 _BOOL2FLD(SCB_CTRL_BYTE_MODE, (config->dataWidth <= CY_SCB_BYTE_WIDTH)) | in Cy_SCB_UART_Init()
339 _VAL2FLD(SCB_RX_CTRL_DATA_WIDTH, (config->dataWidth - 1UL)); in Cy_SCB_UART_Init()
354 _VAL2FLD(SCB_TX_CTRL_DATA_WIDTH, (config->dataWidth - 1UL)) | in Cy_SCB_UART_Init()