Lines Matching refs:buff

1452 __STATIC_INLINE uint32_t Cy_SMIF_PackBytesArray(uint8_t const buff[], bool fourBytes);
1860 uint8_t *buff = (uint8_t*) context->txBufferAddress; in Cy_SMIF_PushTxFifo() local
1871 SMIF_TX_DATA_FIFO_WR4(baseaddr) = Cy_SMIF_PackBytesArray(&buff[0U], true); in Cy_SMIF_PushTxFifo()
1872 SMIF_TX_DATA_FIFO_WR4(baseaddr) = Cy_SMIF_PackBytesArray(&buff[4U], true); in Cy_SMIF_PushTxFifo()
1880 SMIF_TX_DATA_MMIO_FIFO_WR1ODD(baseaddr) = buff[0U]; in Cy_SMIF_PushTxFifo()
1884 SMIF_TX_DATA_MMIO_FIFO_WR1(baseaddr) = buff[0U]; in Cy_SMIF_PushTxFifo()
1887 SMIF_TX_DATA_FIFO_WR1(baseaddr) = buff[0U]; in Cy_SMIF_PushTxFifo()
1892 SMIF_TX_DATA_FIFO_WR2(baseaddr) = Cy_SMIF_PackBytesArray(&buff[0U], false); in Cy_SMIF_PushTxFifo()
1897 SMIF_TX_DATA_FIFO_WR4(baseaddr) = Cy_SMIF_PackBytesArray(&buff[0U], true); in Cy_SMIF_PushTxFifo()
1902 SMIF_TX_DATA_FIFO_WR4(baseaddr) = Cy_SMIF_PackBytesArray(&buff[0U], true); in Cy_SMIF_PushTxFifo()
1903 SMIF_TX_DATA_FIFO_WR2(baseaddr) = Cy_SMIF_PackBytesArray(&buff[4U], false); in Cy_SMIF_PushTxFifo()
1908 SMIF_TX_DATA_FIFO_WR4(baseaddr) = Cy_SMIF_PackBytesArray(&buff[0U], true); in Cy_SMIF_PushTxFifo()
1909 SMIF_TX_DATA_FIFO_WR4(baseaddr) = Cy_SMIF_PackBytesArray(&buff[4U], true); in Cy_SMIF_PushTxFifo()
1912 buff = &buff[writeBytes]; in Cy_SMIF_PushTxFifo()
1921 context->txBufferAddress = buff; in Cy_SMIF_PushTxFifo()
1967 uint8_t *buff = (uint8_t*) context->rxBufferAddress; in Cy_SMIF_PopRxFifo() local
1977 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[0U], true); in Cy_SMIF_PopRxFifo()
1978 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[4U], true); in Cy_SMIF_PopRxFifo()
1982 buff[0U] = (uint8_t)SMIF_RX_DATA_FIFO_RD1(baseaddr); in Cy_SMIF_PopRxFifo()
1986 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD2(baseaddr), &buff[0U], false); in Cy_SMIF_PopRxFifo()
1990 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD2(baseaddr), &buff[0U], false); in Cy_SMIF_PopRxFifo()
1991 buff[2U] = (uint8_t)SMIF_RX_DATA_FIFO_RD1(baseaddr); in Cy_SMIF_PopRxFifo()
1995 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[0U], true); in Cy_SMIF_PopRxFifo()
1999 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[0U], true); in Cy_SMIF_PopRxFifo()
2000 buff[4U] = (uint8_t)SMIF_RX_DATA_FIFO_RD1(baseaddr); in Cy_SMIF_PopRxFifo()
2004 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[0U], true); in Cy_SMIF_PopRxFifo()
2005 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD2(baseaddr), &buff[4U], false); in Cy_SMIF_PopRxFifo()
2009 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[0U], true); in Cy_SMIF_PopRxFifo()
2010 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD2(baseaddr), &buff[4U], false); in Cy_SMIF_PopRxFifo()
2011 buff[6U] = (uint8_t)SMIF_RX_DATA_FIFO_RD1(baseaddr); in Cy_SMIF_PopRxFifo()
2015 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[0U], true); in Cy_SMIF_PopRxFifo()
2016 Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[4U], true); in Cy_SMIF_PopRxFifo()
2020 buff = &buff[readBytes]; in Cy_SMIF_PopRxFifo()
2028 context->rxBufferAddress = buff; in Cy_SMIF_PopRxFifo()
2073 __STATIC_INLINE uint32_t Cy_SMIF_PackBytesArray(uint8_t const buff[], bool fourBytes) in Cy_SMIF_PackBytesArray() argument
2077 result = ((uint32_t)buff[1UL] << 8UL) | (uint32_t)buff[0UL]; in Cy_SMIF_PackBytesArray()
2081 result |= ((uint32_t)buff[3UL] << 24UL) | ((uint32_t)buff[2UL] << 16UL); in Cy_SMIF_PackBytesArray()