435     uint32_t ctl;                    /*!< 0x00000000 Descriptor control */  member
903     CY_REG32_CLR_SET(descriptor->ctl, CY_DMA_CTL_INTR_TYPE, interruptType);  in Cy_DMA_Descriptor_SetInterruptType()
925     return((cy_en_dma_trigger_type_t) _FLD2VAL(CY_DMA_CTL_INTR_TYPE, descriptor->ctl));  in Cy_DMA_Descriptor_GetInterruptType()
949     CY_REG32_CLR_SET(descriptor->ctl, CY_DMA_CTL_TR_IN_TYPE, triggerInType);  in Cy_DMA_Descriptor_SetTriggerInType()
971     return((cy_en_dma_trigger_type_t) _FLD2VAL(CY_DMA_CTL_TR_IN_TYPE, descriptor->ctl));  in Cy_DMA_Descriptor_GetTriggerInType()
995     CY_REG32_CLR_SET(descriptor->ctl, CY_DMA_CTL_TR_OUT_TYPE, triggerOutType);  in Cy_DMA_Descriptor_SetTriggerOutType()
1017     return((cy_en_dma_trigger_type_t) _FLD2VAL(CY_DMA_CTL_TR_OUT_TYPE, descriptor->ctl));  in Cy_DMA_Descriptor_GetTriggerOutType()
1041     CY_REG32_CLR_SET(descriptor->ctl, CY_DMA_CTL_DATA_SIZE, dataSize);  in Cy_DMA_Descriptor_SetDataSize()
1063     return((cy_en_dma_data_size_t) _FLD2VAL(CY_DMA_CTL_DATA_SIZE, descriptor->ctl));  in Cy_DMA_Descriptor_GetDataSize()
1087     CY_REG32_CLR_SET(descriptor->ctl, CY_DMA_CTL_SRC_SIZE, srcTransferSize);  in Cy_DMA_Descriptor_SetSrcTransferSize()
1109     return((cy_en_dma_transfer_size_t) _FLD2VAL(CY_DMA_CTL_SRC_SIZE, descriptor->ctl));  in Cy_DMA_Descriptor_GetSrcTransferSize()
1133     CY_REG32_CLR_SET(descriptor->ctl, CY_DMA_CTL_DST_SIZE, dstTransferSize);  in Cy_DMA_Descriptor_SetDstTransferSize()
1155     return((cy_en_dma_transfer_size_t) _FLD2VAL(CY_DMA_CTL_DST_SIZE, descriptor->ctl));  in Cy_DMA_Descriptor_GetDstTransferSize()
1181     CY_REG32_CLR_SET(descriptor->ctl, CY_DMA_CTL_RETRIG, retrigger);  in Cy_DMA_Descriptor_SetRetrigger()
1204     return((cy_en_dma_retrigger_t) _FLD2VAL(CY_DMA_CTL_RETRIG, descriptor->ctl));  in Cy_DMA_Descriptor_GetRetrigger()
1226     return((cy_en_dma_descriptor_type_t) _FLD2VAL(CY_DMA_CTL_TYPE, descriptor->ctl));  in Cy_DMA_Descriptor_GetDescriptorType()
1250     CY_REG32_CLR_SET(descriptor->ctl, CY_DMA_CTL_CH_DISABLE, channelState);  in Cy_DMA_Descriptor_SetChannelState()
1272     return((cy_en_dma_channel_state_t) _FLD2VAL(CY_DMA_CTL_CH_DISABLE, descriptor->ctl));  in Cy_DMA_Descriptor_GetChannelState()
2065     #define DESCR_CTL                       ctl
2151         regValue = descriptor->ctl & ((uint32_t)(~(DW_DESCR_STRUCT_DESCR_CTL_DATA_SIZE_Msk |  in Cy_DMA_Descr_SetTxfrWidth()
2155         descriptor->ctl = regValue |  in Cy_DMA_Descr_SetTxfrWidth()