1295     CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_SetXloopDataCount()
1321     CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_GetXloopDataCount()
1346     CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_SetXloopSrcIncrement()
1372     CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_GetXloopSrcIncrement()
1397     CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_SetXloopDstIncrement()
1423     CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_GetXloopDstIncrement()
1448     CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_SetYloopDataCount()
1474     CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_GetYloopDataCount()
1499     CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_SetYloopSrcIncrement()
1525     CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_GetYloopSrcIncrement()
1550     CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_SetYloopDstIncrement()
1576     CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor));  in Cy_DMA_Descriptor_GetYloopDstIncrement()
1613     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_SetDescriptor()
1638     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_Enable()
1662     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_Disable()
1686     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_IsEnabled()
1713     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_SetPriority()
1741     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_GetPriority()
1768     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_GetCurrentDescriptor()
1794     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_GetCurrentYIndex()
1820     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_GetInterruptStatus()
1847     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_GetStatus()
1871     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_ClearInterrupt()
1897     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_SetInterrupt()
1924     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_GetInterruptMask()
1952     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_SetInterruptMask()
1977     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_GetInterruptStatusMasked()
1999     CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel));  in Cy_DMA_Channel_SetSWTrigger()