Lines Matching refs:obj
173 cyhal_uart_t* obj = (cyhal_uart_t*)_cyhal_uart_irq_obj; in _cyhal_uart_irq_handler() local
176 uint32_t txMasked = Cy_SCB_GetTxInterruptStatusMasked(obj->base); in _cyhal_uart_irq_handler()
177 uint32_t rxMasked = Cy_SCB_GetRxInterruptStatusMasked(obj->base); in _cyhal_uart_irq_handler()
180 Cy_SCB_UART_Interrupt(obj->base, &(obj->context)); in _cyhal_uart_irq_handler()
187 Cy_SCB_ClearTxInterrupt(obj->base, CY_SCB_UART_TX_OVERFLOW); in _cyhal_uart_irq_handler()
189 if (NULL != obj->context.cbEvents) in _cyhal_uart_irq_handler()
191 obj->context.cbEvents(CY_SCB_UART_TRANSMIT_ERR_EVENT); in _cyhal_uart_irq_handler()
200 Cy_SCB_ClearTxInterrupt(obj->base, CY_SCB_UART_TX_UNDERFLOW); in _cyhal_uart_irq_handler()
202 if (NULL != obj->context.cbEvents) in _cyhal_uart_irq_handler()
204 obj->context.cbEvents(CY_SCB_UART_TRANSMIT_ERR_EVENT); in _cyhal_uart_irq_handler()
213 if (NULL != obj->context.cbEvents) in _cyhal_uart_irq_handler()
216 obj->context.cbEvents(CYHAL_UART_IRQ_TX_FIFO >> 1u); in _cyhal_uart_irq_handler()
223 Cy_SCB_ClearTxInterrupt(obj->base, CY_SCB_UART_TX_DONE); in _cyhal_uart_irq_handler()
224 … Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) | CY_SCB_UART_TX_DONE); in _cyhal_uart_irq_handler()
232 Cy_SCB_ClearRxInterrupt(obj->base, CY_SCB_RX_INTR_UNDERFLOW); in _cyhal_uart_irq_handler()
234 if (NULL != obj->context.cbEvents) in _cyhal_uart_irq_handler()
236 obj->context.cbEvents(CY_SCB_UART_RECEIVE_ERR_EVENT); in _cyhal_uart_irq_handler()
245 if (NULL != obj->context.cbEvents) in _cyhal_uart_irq_handler()
248 obj->context.cbEvents(CYHAL_UART_IRQ_RX_FIFO >> 1u); in _cyhal_uart_irq_handler()
279 cy_rslt_t _cyhal_uart_dma_write_async(cyhal_uart_t *obj);
285 cyhal_uart_t* obj = (cyhal_uart_t*)arg; in _cyhal_uart_dma_handler_tx() local
286 CY_ASSERT(CYHAL_ASYNC_DMA == obj->async_mode); in _cyhal_uart_dma_handler_tx()
288 if(obj->async_tx_length > 0) in _cyhal_uart_dma_handler_tx()
291 _cyhal_uart_dma_write_async(obj); in _cyhal_uart_dma_handler_tx()
295 obj->async_tx_buff = NULL; in _cyhal_uart_dma_handler_tx()
297 … if(obj->user_fifo_level != ((SCB_TX_FIFO_CTRL(obj->base) & SCB_TX_FIFO_CTRL_TRIGGER_LEVEL_Msk))) in _cyhal_uart_dma_handler_tx()
299 …_cyhal_scb_set_fifo_level(obj->base, (cyhal_scb_fifo_type_t)CYHAL_UART_FIFO_TX, obj->user_fifo_lev… in _cyhal_uart_dma_handler_tx()
302 if(0 == (CYHAL_UART_IRQ_TX_FIFO & ((cyhal_uart_event_t)obj->irq_cause))) in _cyhal_uart_dma_handler_tx()
304 …Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) & ~CY_SCB_TX_INTR_LEVEL); in _cyhal_uart_dma_handler_tx()
307 if(0 != ((cyhal_uart_event_t)obj->irq_cause & CYHAL_UART_IRQ_TX_TRANSMIT_IN_FIFO)) in _cyhal_uart_dma_handler_tx()
309 … cyhal_uart_event_callback_t callback = (cyhal_uart_event_callback_t)obj->callback_data.callback; in _cyhal_uart_dma_handler_tx()
312 callback(obj->callback_data.callback_arg, CYHAL_UART_IRQ_TX_TRANSMIT_IN_FIFO); in _cyhal_uart_dma_handler_tx()
318 cy_rslt_t _cyhal_uart_dma_read_async(cyhal_uart_t *obj);
324 cyhal_uart_t* obj = (cyhal_uart_t*)arg; in _cyhal_uart_dma_handler_rx() local
325 CY_ASSERT(CYHAL_ASYNC_DMA == obj->async_mode); in _cyhal_uart_dma_handler_rx()
327 if(obj->async_rx_length > 0) in _cyhal_uart_dma_handler_rx()
330 _cyhal_uart_dma_read_async(obj); in _cyhal_uart_dma_handler_rx()
334 obj->async_rx_buff = NULL; in _cyhal_uart_dma_handler_rx()
336 … if(obj->user_fifo_level != ((SCB_RX_FIFO_CTRL(obj->base) & SCB_RX_FIFO_CTRL_TRIGGER_LEVEL_Msk))) in _cyhal_uart_dma_handler_rx()
338 …_cyhal_scb_set_fifo_level(obj->base, (cyhal_scb_fifo_type_t)CYHAL_UART_FIFO_RX, obj->user_fifo_lev… in _cyhal_uart_dma_handler_rx()
341 if(0 != ((cyhal_uart_event_t)obj->irq_cause & CYHAL_UART_IRQ_RX_DONE)) in _cyhal_uart_dma_handler_rx()
343 … cyhal_uart_event_callback_t callback = (cyhal_uart_event_callback_t)obj->callback_data.callback; in _cyhal_uart_dma_handler_rx()
346 callback(obj->callback_data.callback_arg, CYHAL_UART_IRQ_RX_DONE); in _cyhal_uart_dma_handler_rx()
377 cyhal_uart_t *obj = (cyhal_uart_t*)_cyhal_uart_irq_obj; in _cyhal_uart_cb_wrapper() local
378 cyhal_uart_event_t anded_events = (cyhal_uart_event_t)(obj->irq_cause & hal_event); in _cyhal_uart_cb_wrapper()
381 … cyhal_uart_event_callback_t callback = (cyhal_uart_event_callback_t) obj->callback_data.callback; in _cyhal_uart_cb_wrapper()
382 callback(obj->callback_data.callback_arg, anded_events); in _cyhal_uart_cb_wrapper()
388 cyhal_uart_t *obj = (cyhal_uart_t*)obj_ptr; in _cyhal_uart_pm_callback_instance() local
393 GPIO_PRT_Type *txport = obj->pin_tx != NC ? CYHAL_GET_PORTADDR(obj->pin_tx) : NULL; in _cyhal_uart_pm_callback_instance()
394 …GPIO_PRT_Type *rtsport = ((obj->pin_rts != NC) && obj->rts_enabled) ? CYHAL_GET_PORTADDR(obj->pin_… in _cyhal_uart_pm_callback_instance()
395 uint8_t txpin = (uint8_t)CYHAL_GET_PIN(obj->pin_tx); in _cyhal_uart_pm_callback_instance()
396 uint8_t rtspin = (uint8_t)CYHAL_GET_PIN(obj->pin_rts); in _cyhal_uart_pm_callback_instance()
409 …0UL == (CY_SCB_UART_TRANSMIT_ACTIVE & Cy_SCB_UART_GetTransmitStatus(obj->base, &(obj->context)))) … in _cyhal_uart_pm_callback_instance()
410 … (0UL == (CY_SCB_UART_RECEIVE_ACTIVE & Cy_SCB_UART_GetReceiveStatus (obj->base, &(obj->context)))) in _cyhal_uart_pm_callback_instance()
412 & (obj->async_rx_buff == NULL) & (obj->async_tx_buff == NULL)) in _cyhal_uart_pm_callback_instance()
421 if (Cy_SCB_UART_IsTxComplete(obj->base)) in _cyhal_uart_pm_callback_instance()
423 if (0UL == Cy_SCB_UART_GetNumInRxFifo(obj->base)) in _cyhal_uart_pm_callback_instance()
435 cyhal_uart_set_baud(obj, obj->baud_rate, NULL); in _cyhal_uart_pm_callback_instance()
439 Cy_GPIO_SetHSIOM(rtsport, rtspin, obj->saved_rts_hsiom); in _cyhal_uart_pm_callback_instance()
448 obj->saved_rts_hsiom = Cy_GPIO_GetHSIOM(rtsport, rtspin); in _cyhal_uart_pm_callback_instance()
462 …0UL == (CY_SCB_UART_TRANSMIT_ACTIVE & Cy_SCB_UART_GetTransmitStatus(obj->base, &(obj->context)))) … in _cyhal_uart_pm_callback_instance()
463 … (0UL == (CY_SCB_UART_RECEIVE_ACTIVE & Cy_SCB_UART_GetReceiveStatus (obj->base, &(obj->context)))) in _cyhal_uart_pm_callback_instance()
465 & (obj->async_rx_buff == NULL) & (obj->async_tx_buff == NULL)) in _cyhal_uart_pm_callback_instance()
478 uint32_t txMasked = Cy_SCB_GetTxInterruptStatusMasked(obj->base); in _cyhal_uart_pm_callback_instance()
479 uint32_t rxMasked = Cy_SCB_GetRxInterruptStatusMasked(obj->base); in _cyhal_uart_pm_callback_instance()
485 if (Cy_SCB_UART_IsTxComplete(obj->base) in _cyhal_uart_pm_callback_instance()
486 && (0UL == Cy_SCB_UART_GetNumInRxFifo(obj->base)) in _cyhal_uart_pm_callback_instance()
498 obj->saved_tx_hsiom = Cy_GPIO_GetHSIOM(txport, txpin); in _cyhal_uart_pm_callback_instance()
504 obj->saved_rts_hsiom = Cy_GPIO_GetHSIOM(rtsport, rtspin); in _cyhal_uart_pm_callback_instance()
509 Cy_SCB_UART_Disable(obj->base, &(obj->context)); in _cyhal_uart_pm_callback_instance()
519 Cy_SCB_UART_Enable(obj->base); in _cyhal_uart_pm_callback_instance()
522 Cy_GPIO_SetHSIOM(txport, txpin, obj->saved_tx_hsiom); in _cyhal_uart_pm_callback_instance()
526 Cy_GPIO_SetHSIOM(rtsport, rtspin, obj->saved_rts_hsiom); in _cyhal_uart_pm_callback_instance()
617 static cy_rslt_t _cyhal_uart_setup_resources(cyhal_uart_t *obj, cyhal_gpio_t tx, cyhal_gpio_t rx, c… in _cyhal_uart_setup_resources() argument
623 obj->resource.type = CYHAL_RSC_INVALID; in _cyhal_uart_setup_resources()
624 obj->is_clock_owned = false; in _cyhal_uart_setup_resources()
625 obj->pin_rx = CYHAL_NC_PIN_VALUE; in _cyhal_uart_setup_resources()
626 obj->pin_tx = CYHAL_NC_PIN_VALUE; in _cyhal_uart_setup_resources()
627 obj->pin_cts = CYHAL_NC_PIN_VALUE; in _cyhal_uart_setup_resources()
628 obj->pin_rts = CYHAL_NC_PIN_VALUE; in _cyhal_uart_setup_resources()
694 obj->resource = uart_rsc; in _cyhal_uart_setup_resources()
702 obj->pin_tx = tx; in _cyhal_uart_setup_resources()
712 obj->pin_rx = rx; in _cyhal_uart_setup_resources()
722 obj->cts_enabled = true; in _cyhal_uart_setup_resources()
723 obj->pin_cts = cts; in _cyhal_uart_setup_resources()
733 obj->rts_enabled = true; in _cyhal_uart_setup_resources()
734 obj->pin_rts = rts; in _cyhal_uart_setup_resources()
742 …result = _cyhal_utils_allocate_clock(&(obj->clock), &obj->resource, CYHAL_CLOCK_BLOCK_PERIPHERAL_1… in _cyhal_uart_setup_resources()
743 obj->is_clock_owned = (CY_RSLT_SUCCESS == result); in _cyhal_uart_setup_resources()
747 obj->is_clock_owned = false; in _cyhal_uart_setup_resources()
748 obj->clock = *clk; in _cyhal_uart_setup_resources()
755 _cyhal_scb_get_clock_index(obj->resource.block_num), &(obj->clock)); in _cyhal_uart_setup_resources()
761 static cy_rslt_t _cyhal_uart_init_hw(cyhal_uart_t *obj) in _cyhal_uart_init_hw() argument
763 uint8_t scb_arr_index = _cyhal_scb_get_block_index(obj->resource.block_num); in _cyhal_uart_init_hw()
764 obj->base = _CYHAL_SCB_BASE_ADDRESSES[scb_arr_index]; in _cyhal_uart_init_hw()
768 if(obj->is_clock_owned == true) in _cyhal_uart_init_hw()
770 cyhal_uart_set_baud(obj, CYHAL_UART_DEFAULT_BAUD, NULL); in _cyhal_uart_init_hw()
775 Cy_SCB_EnableClock(obj->base, cyhal_clock_get_frequency(&(obj->clock)), false); in _cyhal_uart_init_hw()
779 cy_rslt_t result = (cy_rslt_t) Cy_SCB_UART_Init(obj->base, &(obj->config), &(obj->context)); in _cyhal_uart_init_hw()
783 obj->callback_data.callback = NULL; in _cyhal_uart_init_hw()
784 obj->callback_data.callback_arg = NULL; in _cyhal_uart_init_hw()
785 obj->irq_cause = CYHAL_UART_IRQ_NONE; in _cyhal_uart_init_hw()
788 … Cy_SCB_RegisterInterruptCallback(obj->base, _cyhal_irq_cb[_CYHAL_SCB_IRQ_N[scb_arr_index]]); in _cyhal_uart_init_hw()
789 Cy_SCB_EnableInterrupt(obj->base); in _cyhal_uart_init_hw()
795 …_cyhal_scb_update_instance_data(obj->resource.block_num, (void*)obj, &_cyhal_uart_pm_callback_inst… in _cyhal_uart_init_hw()
797 Cy_SCB_UART_Enable(obj->base); in _cyhal_uart_init_hw()
803 cy_rslt_t cyhal_uart_init(cyhal_uart_t *obj, cyhal_gpio_t tx, cyhal_gpio_t rx, cyhal_gpio_t cts, cy… in cyhal_uart_init() argument
806 CY_ASSERT(NULL != obj); in cyhal_uart_init()
807 memset(obj, 0, sizeof(cyhal_uart_t)); in cyhal_uart_init()
809 obj->dc_configured = false; in cyhal_uart_init()
811 obj->async_mode = CYHAL_ASYNC_SW; in cyhal_uart_init()
813 obj->dma_tx.resource.type = CYHAL_RSC_INVALID; in cyhal_uart_init()
814 obj->dma_rx.resource.type = CYHAL_RSC_INVALID; in cyhal_uart_init()
816 obj->baud_rate = CYHAL_UART_DEFAULT_BAUD; in cyhal_uart_init()
817 cy_rslt_t result = _cyhal_uart_setup_resources(obj, tx, rx, cts, rts, clk); in cyhal_uart_init()
821 obj->config = _cyhal_uart_default_config; in cyhal_uart_init()
822 obj->config.enableCts = obj->cts_enabled; in cyhal_uart_init()
826 obj->config.dataWidth = cfg->data_bits; in cyhal_uart_init()
827 obj->config.stopBits = _cyhal_uart_convert_stopbits((uint8_t)cfg->stop_bits); in cyhal_uart_init()
828 obj->config.parity = _cyhal_uart_convert_parity(cfg->parity); in cyhal_uart_init()
831 result = _cyhal_uart_init_hw(obj); in cyhal_uart_init()
838 cyhal_uart_config_software_buffer(obj, cfg->rx_buffer, cfg->rx_buffer_size); in cyhal_uart_init()
843 if (obj->is_clock_owned) in cyhal_uart_init()
845 result = cyhal_uart_set_baud(obj, obj->baud_rate, NULL); in cyhal_uart_init()
851 obj->user_fifo_level = (Cy_SCB_GetFifoSize(obj->base) / 2); in cyhal_uart_init()
857 cyhal_uart_free(obj); in cyhal_uart_init()
862 cy_rslt_t cyhal_uart_init_cfg(cyhal_uart_t *obj, const cyhal_uart_configurator_t *cfg) in cyhal_uart_init_cfg() argument
864 CY_ASSERT(NULL != obj); in cyhal_uart_init_cfg()
867 memset(obj, 0, sizeof(cyhal_uart_t)); in cyhal_uart_init_cfg()
869 obj->resource = *cfg->resource; in cyhal_uart_init_cfg()
870 obj->clock = *cfg->clock; in cyhal_uart_init_cfg()
871 obj->is_clock_owned = false; in cyhal_uart_init_cfg()
872 obj->pin_tx = cfg->gpios.pin_tx; in cyhal_uart_init_cfg()
873 obj->pin_rts = cfg->gpios.pin_rts; in cyhal_uart_init_cfg()
874 obj->pin_cts = cfg->gpios.pin_cts; in cyhal_uart_init_cfg()
875 obj->dc_configured = true; in cyhal_uart_init_cfg()
876 obj->cts_enabled = cfg->config->enableCts; in cyhal_uart_init_cfg()
877 obj->rts_enabled = (NC != cfg->gpios.pin_rts); in cyhal_uart_init_cfg()
879 obj->async_mode = CYHAL_ASYNC_SW; in cyhal_uart_init_cfg()
880 obj->dma_tx.resource.type = CYHAL_RSC_INVALID; in cyhal_uart_init_cfg()
881 obj->dma_rx.resource.type = CYHAL_RSC_INVALID; in cyhal_uart_init_cfg()
884 obj->config = *cfg->config; in cyhal_uart_init_cfg()
885 cy_rslt_t result = _cyhal_uart_init_hw(obj); in cyhal_uart_init_cfg()
891 obj->user_fifo_level = (Cy_SCB_GetFifoSize(obj->base) / 2); in cyhal_uart_init_cfg()
898 void cyhal_uart_free(cyhal_uart_t *obj) in cyhal_uart_free() argument
900 CY_ASSERT(NULL != obj); in cyhal_uart_free()
902 if (NULL != obj->base) in cyhal_uart_free()
904 Cy_SCB_UART_Disable(obj->base, &obj->context); in cyhal_uart_free()
905 Cy_SCB_UART_DeInit(obj->base); in cyhal_uart_free()
906 obj->base = NULL; in cyhal_uart_free()
909 if (obj->resource.type != CYHAL_RSC_INVALID) in cyhal_uart_free()
911 uint8_t scb_arr_index = _cyhal_scb_get_block_index(obj->resource.block_num); in cyhal_uart_free()
915 _cyhal_scb_update_instance_data(obj->resource.block_num, NULL, NULL); in cyhal_uart_free()
917 if (false == obj->dc_configured) in cyhal_uart_free()
919 …t_t rsc_to_free = { CYHAL_RSC_SCB, _cyhal_scb_get_block_index(obj->resource.block_num), obj->resou… in cyhal_uart_free()
923 obj->resource.type = CYHAL_RSC_INVALID; in cyhal_uart_free()
926 if (false == obj->dc_configured) in cyhal_uart_free()
928 _cyhal_utils_release_if_used(&(obj->pin_rx)); in cyhal_uart_free()
929 _cyhal_utils_release_if_used(&(obj->pin_tx)); in cyhal_uart_free()
930 _cyhal_utils_release_if_used(&(obj->pin_rts)); in cyhal_uart_free()
931 _cyhal_utils_release_if_used(&(obj->pin_cts)); in cyhal_uart_free()
933 if (obj->is_clock_owned) in cyhal_uart_free()
935 cyhal_clock_free(&(obj->clock)); in cyhal_uart_free()
940 if(obj->async_mode == CYHAL_ASYNC_DMA) in cyhal_uart_free()
942 if(CYHAL_RSC_INVALID != obj->dma_tx.resource.type) in cyhal_uart_free()
944 cyhal_dma_free(&obj->dma_tx); in cyhal_uart_free()
945 obj->dma_tx.resource.type = CYHAL_RSC_INVALID; in cyhal_uart_free()
947 if(CYHAL_RSC_INVALID != obj->dma_rx.resource.type) in cyhal_uart_free()
949 cyhal_dma_free(&obj->dma_rx); in cyhal_uart_free()
950 obj->dma_rx.resource.type = CYHAL_RSC_INVALID; in cyhal_uart_free()
956 cy_rslt_t cyhal_uart_set_baud(cyhal_uart_t *obj, uint32_t baudrate, uint32_t *actualbaud) in cyhal_uart_set_baud() argument
959 if( obj->baud_rate != baudrate) in cyhal_uart_set_baud()
961 obj->baud_rate = baudrate; in cyhal_uart_set_baud()
964 if (obj->is_clock_owned) in cyhal_uart_set_baud()
970 Cy_SCB_UART_Disable(obj->base, NULL); in cyhal_uart_set_baud()
971 status = cyhal_clock_set_enabled(&(obj->clock), false, false); in cyhal_uart_set_baud()
974 Cy_SCB_UART_Enable(obj->base); in cyhal_uart_set_baud()
978 oversample_value = _cyhal_uart_best_oversample(&(obj->resource), baudrate); in cyhal_uart_set_baud()
979 obj->config.oversample = oversample_value; in cyhal_uart_set_baud()
981 divider = _cyhal_utils_divider_value(&(obj->resource), baudrate * oversample_value, 0); in cyhal_uart_set_baud()
983 if( !_cyhal_clock_is_divider_valid(&(obj->resource),divider)) in cyhal_uart_set_baud()
985 Cy_SCB_UART_Enable(obj->base); in cyhal_uart_set_baud()
992 status = _cyhal_utils_peri_pclk_set_freq(0, &(obj->clock), baudrate, oversample_value); in cyhal_uart_set_baud()
994 status = cyhal_clock_set_divider(&(obj->clock), divider); in cyhal_uart_set_baud()
998 cyhal_clock_set_enabled(&(obj->clock), true, false); in cyhal_uart_set_baud()
999 Cy_SCB_UART_Enable(obj->base); in cyhal_uart_set_baud()
1003 calculated_baud = _cyhal_uart_actual_baud(&(obj->resource), divider, oversample_value); in cyhal_uart_set_baud()
1011 status = cyhal_clock_set_enabled(&(obj->clock), true, false); in cyhal_uart_set_baud()
1015 uint32_t mem_width = (obj->config.dataWidth <= CY_SCB_BYTE_WIDTH) in cyhal_uart_set_baud()
1022 SCB_CTRL(obj->base) = _BOOL2FLD(SCB_CTRL_ADDR_ACCEPT, obj->config.acceptAddrInFifo) | in cyhal_uart_set_baud()
1027 SCB_CTRL(obj->base) = _BOOL2FLD(SCB_CTRL_ADDR_ACCEPT, obj->config.acceptAddrInFifo) | in cyhal_uart_set_baud()
1028 _BOOL2FLD(SCB_CTRL_BYTE_MODE, (obj->config.dataWidth <= CY_SCB_BYTE_WIDTH)) | in cyhal_uart_set_baud()
1033 Cy_SCB_UART_Enable(obj->base); in cyhal_uart_set_baud()
1044 cy_rslt_t cyhal_uart_configure(cyhal_uart_t *obj, const cyhal_uart_cfg_t *cfg) in cyhal_uart_configure() argument
1046 CY_ASSERT(NULL != obj); in cyhal_uart_configure()
1048 Cy_SCB_UART_Disable(obj->base, NULL); in cyhal_uart_configure()
1049 obj->config.dataWidth = cfg->data_bits; in cyhal_uart_configure()
1050 obj->config.stopBits = _cyhal_uart_convert_stopbits((uint8_t)cfg->stop_bits); in cyhal_uart_configure()
1051 obj->config.parity = _cyhal_uart_convert_parity(cfg->parity); in cyhal_uart_configure()
1052 obj->config.enableCts = obj->cts_enabled; in cyhal_uart_configure()
1054 Cy_SCB_UART_Init(obj->base, &(obj->config), NULL); in cyhal_uart_configure()
1055 Cy_SCB_UART_Enable(obj->base); in cyhal_uart_configure()
1059 cy_rslt_t cyhal_uart_getc(cyhal_uart_t *obj, uint8_t *value, uint32_t timeout) in cyhal_uart_getc() argument
1064 uint32_t read_value = Cy_SCB_UART_Get(obj->base); in cyhal_uart_getc()
1080 read_value = Cy_SCB_UART_Get(obj->base); in cyhal_uart_getc()
1086 cy_rslt_t cyhal_uart_putc(cyhal_uart_t *obj, uint32_t value) in cyhal_uart_putc() argument
1094 count = Cy_SCB_UART_Put(obj->base, value); in cyhal_uart_putc()
1100 uint32_t cyhal_uart_readable(cyhal_uart_t *obj) in cyhal_uart_readable() argument
1102 uint32_t number_available = Cy_SCB_UART_GetNumInRxFifo(obj->base); in cyhal_uart_readable()
1103 if(obj->context.rxRingBuf != NULL) in cyhal_uart_readable()
1105 number_available += Cy_SCB_UART_GetNumInRingBuffer(obj->base, &(obj->context)); in cyhal_uart_readable()
1110 uint32_t cyhal_uart_writable(cyhal_uart_t *obj) in cyhal_uart_writable() argument
1112 return Cy_SCB_GetFifoSize(obj->base) - Cy_SCB_GetNumInTxFifo(obj->base); in cyhal_uart_writable()
1115 cy_rslt_t cyhal_uart_clear(cyhal_uart_t *obj) in cyhal_uart_clear() argument
1117 Cy_SCB_UART_ClearRxFifo(obj->base); in cyhal_uart_clear()
1118 Cy_SCB_UART_ClearTxFifo(obj->base); in cyhal_uart_clear()
1120 if(obj->context.rxRingBuf != NULL) in cyhal_uart_clear()
1122 Cy_SCB_UART_ClearRingBuffer(obj->base, &(obj->context)); in cyhal_uart_clear()
1128 cy_rslt_t cyhal_uart_enable_flow_control(cyhal_uart_t *obj, bool enable_cts, bool enable_rts) in cyhal_uart_enable_flow_control() argument
1132 if (obj->pin_cts != NC) in cyhal_uart_enable_flow_control()
1134 if (enable_cts && (false == obj->cts_enabled)) in cyhal_uart_enable_flow_control()
1136 …e_pin_mapping_t *cts_map = _CYHAL_SCB_FIND_MAP_BLOCK(obj->pin_cts, cyhal_pin_map_scb_uart_cts, &ob… in cyhal_uart_enable_flow_control()
1137 if (false == obj->dc_configured) in cyhal_uart_enable_flow_control()
1147 Cy_SCB_UART_EnableCts(obj->base); in cyhal_uart_enable_flow_control()
1148 obj->cts_enabled = true; in cyhal_uart_enable_flow_control()
1153 if (false == obj->dc_configured) in cyhal_uart_enable_flow_control()
1155 _cyhal_utils_disconnect_and_free(obj->pin_cts); in cyhal_uart_enable_flow_control()
1159 result = cyhal_disconnect_pin(obj->pin_cts); in cyhal_uart_enable_flow_control()
1163 Cy_SCB_UART_DisableCts(obj->base); in cyhal_uart_enable_flow_control()
1164 obj->cts_enabled = false; in cyhal_uart_enable_flow_control()
1169 if ((CY_RSLT_SUCCESS == result) && (obj->pin_rts != NC)) in cyhal_uart_enable_flow_control()
1171 if (enable_rts && (false == obj->rts_enabled)) in cyhal_uart_enable_flow_control()
1173 …e_pin_mapping_t *rts_map = _CYHAL_SCB_FIND_MAP_BLOCK(obj->pin_rts, cyhal_pin_map_scb_uart_rts, &ob… in cyhal_uart_enable_flow_control()
1174 if (false == obj->dc_configured) in cyhal_uart_enable_flow_control()
1182 obj->rts_enabled = (CY_RSLT_SUCCESS == result); in cyhal_uart_enable_flow_control()
1186 if (false == obj->dc_configured) in cyhal_uart_enable_flow_control()
1188 _cyhal_utils_disconnect_and_free(obj->pin_rts); in cyhal_uart_enable_flow_control()
1192 result = cyhal_disconnect_pin(obj->pin_rts); in cyhal_uart_enable_flow_control()
1196 obj->rts_enabled = false; in cyhal_uart_enable_flow_control()
1204 cy_rslt_t cyhal_uart_write(cyhal_uart_t *obj, void *tx, size_t *tx_length) in cyhal_uart_write() argument
1209 *tx_length = Cy_SCB_UART_PutArray(obj->base, tx, *tx_length); in cyhal_uart_write()
1214 cy_rslt_t cyhal_uart_read(cyhal_uart_t *obj, void *rx, size_t *rx_length) in cyhal_uart_read() argument
1219 *rx_length = Cy_SCB_UART_GetArray(obj->base, rx, *rx_length); in cyhal_uart_read()
1223 cy_rslt_t cyhal_uart_set_async_mode(cyhal_uart_t *obj, cyhal_async_mode_t mode, uint8_t dma_priorit… in cyhal_uart_set_async_mode() argument
1225 CY_ASSERT(NULL != obj); in cyhal_uart_set_async_mode()
1231 if((obj->async_tx_buff != NULL) || (obj->async_rx_buff != NULL)) in cyhal_uart_set_async_mode()
1242 if (obj->context.rxRingBuf != NULL) in cyhal_uart_set_async_mode()
1249 if(CYHAL_RSC_INVALID == obj->dma_tx.resource.type && obj->pin_tx != CYHAL_NC_PIN_VALUE) in cyhal_uart_set_async_mode()
1252 cyhal_uart_disable_output(obj, CYHAL_UART_OUTPUT_TRIGGER_TX_FIFO_LEVEL_REACHED); in cyhal_uart_set_async_mode()
1253 … cyhal_uart_enable_output(obj, CYHAL_UART_OUTPUT_TRIGGER_TX_FIFO_LEVEL_REACHED, &source_tx); in cyhal_uart_set_async_mode()
1260 …result = cyhal_dma_init_adv(&(obj->dma_tx), &dma_src_tx, NULL, NULL, dma_priority, CYHAL_DMA_DIREC… in cyhal_uart_set_async_mode()
1262 cyhal_dma_register_callback(&(obj->dma_tx), &_cyhal_uart_dma_handler_tx, obj); in cyhal_uart_set_async_mode()
1265 if(CYHAL_RSC_INVALID == obj->dma_rx.resource.type && obj->pin_rx != CYHAL_NC_PIN_VALUE) in cyhal_uart_set_async_mode()
1268 cyhal_uart_disable_output(obj, CYHAL_UART_OUTPUT_TRIGGER_RX_FIFO_LEVEL_REACHED); in cyhal_uart_set_async_mode()
1269 … cyhal_uart_enable_output(obj, CYHAL_UART_OUTPUT_TRIGGER_RX_FIFO_LEVEL_REACHED, &source_rx); in cyhal_uart_set_async_mode()
1276 …cyhal_dma_init_adv(&(obj->dma_rx), &dma_src_rx, NULL, NULL, dma_priority, CYHAL_DMA_DIRECTION_PERI… in cyhal_uart_set_async_mode()
1278 cyhal_dma_register_callback(&(obj->dma_rx), &_cyhal_uart_dma_handler_rx, obj); in cyhal_uart_set_async_mode()
1282 Cy_SCB_UART_SetRtsFifoLevel(obj->base, Cy_SCB_GetFifoSize(obj->base) - 1); in cyhal_uart_set_async_mode()
1285 CY_UNUSED_PARAMETER(obj); in cyhal_uart_set_async_mode()
1294 if(CYHAL_RSC_INVALID != obj->dma_tx.resource.type) in cyhal_uart_set_async_mode()
1296 cyhal_dma_free(&obj->dma_tx); in cyhal_uart_set_async_mode()
1297 obj->dma_tx.resource.type = CYHAL_RSC_INVALID; in cyhal_uart_set_async_mode()
1299 if(CYHAL_RSC_INVALID != obj->dma_rx.resource.type) in cyhal_uart_set_async_mode()
1301 cyhal_dma_free(&obj->dma_rx); in cyhal_uart_set_async_mode()
1302 obj->dma_rx.resource.type = CYHAL_RSC_INVALID; in cyhal_uart_set_async_mode()
1306 Cy_SCB_UART_SetRtsFifoLevel(obj->base, _cyhal_uart_default_config.rtsRxFifoLevel); in cyhal_uart_set_async_mode()
1313 obj->async_mode = mode; in cyhal_uart_set_async_mode()
1320 cy_rslt_t _cyhal_uart_dma_write_async(cyhal_uart_t *obj) in _cyhal_uart_dma_write_async() argument
1322 if(cyhal_dma_is_busy(&(obj->dma_tx))) in _cyhal_uart_dma_write_async()
1327 CY_ASSERT(NULL != obj->async_tx_buff); in _cyhal_uart_dma_write_async()
1330 uint32_t length = obj->async_tx_length; in _cyhal_uart_dma_write_async()
1331 if(length >= Cy_SCB_GetFifoSize(obj->base)) in _cyhal_uart_dma_write_async()
1333 length = (Cy_SCB_GetFifoSize(obj->base) / 2); in _cyhal_uart_dma_write_async()
1336 uint32_t mem_width = (obj->config.dataWidth <= CY_SCB_BYTE_WIDTH) ? 8 : 16; in _cyhal_uart_dma_write_async()
1339 .src_addr = (uint32_t)obj->async_tx_buff, in _cyhal_uart_dma_write_async()
1341 .dst_addr = (uint32_t)&obj->base->TX_FIFO_WR, in _cyhal_uart_dma_write_async()
1351 obj->async_tx_buff = ((length * (mem_width / 8)) + (char*)obj->async_tx_buff); in _cyhal_uart_dma_write_async()
1352 obj->async_tx_length -= length; in _cyhal_uart_dma_write_async()
1356 …cy_rslt_t result = cyhal_uart_set_fifo_level(obj, CYHAL_UART_FIFO_TX, Cy_SCB_GetFifoSize(obj->base… in _cyhal_uart_dma_write_async()
1359 …cyhal_dma_enable_event(&(obj->dma_tx), CYHAL_DMA_TRANSFER_COMPLETE, CYHAL_DMA_PRIORITY_DEFAULT, tr… in _cyhal_uart_dma_write_async()
1361 obj->dma_tx.descriptor_config.dw.retrigger = CY_DMA_WAIT_FOR_REACT; in _cyhal_uart_dma_write_async()
1363 result = cyhal_dma_configure(&(obj->dma_tx), &dma_config); in _cyhal_uart_dma_write_async()
1367 SCB_CleanDCache_by_Addr((void *)obj->async_tx_buff, (length * (mem_width / 8))); in _cyhal_uart_dma_write_async()
1372 result = cyhal_dma_enable(&(obj->dma_tx)); in _cyhal_uart_dma_write_async()
1378 cy_rslt_t cyhal_uart_write_async(cyhal_uart_t *obj, void *tx, size_t length) in cyhal_uart_write_async() argument
1385 if(obj->async_mode == CYHAL_ASYNC_DMA) in cyhal_uart_write_async()
1388 obj->async_tx_buff = tx; in cyhal_uart_write_async()
1389 obj->async_tx_length = length; in cyhal_uart_write_async()
1390 result = _cyhal_uart_dma_write_async(obj); in cyhal_uart_write_async()
1396 result = Cy_SCB_UART_Transmit(obj->base, tx, length, &(obj->context)); in cyhal_uart_write_async()
1402 cy_rslt_t _cyhal_uart_dma_read_async(cyhal_uart_t *obj) in _cyhal_uart_dma_read_async() argument
1404 if(cyhal_dma_is_busy(&(obj->dma_rx))) in _cyhal_uart_dma_read_async()
1409 CY_ASSERT(NULL != obj->async_rx_buff); in _cyhal_uart_dma_read_async()
1412 uint32_t length = obj->async_rx_length; in _cyhal_uart_dma_read_async()
1413 if(length >= Cy_SCB_GetFifoSize(obj->base)) in _cyhal_uart_dma_read_async()
1415 length = (Cy_SCB_GetFifoSize(obj->base) / 2); in _cyhal_uart_dma_read_async()
1418 uint32_t mem_width = (obj->config.dataWidth <= CY_SCB_BYTE_WIDTH) ? 8 : 16; in _cyhal_uart_dma_read_async()
1421 .src_addr = (uint32_t)(&(obj->base->RX_FIFO_RD)), in _cyhal_uart_dma_read_async()
1423 .dst_addr = (uint32_t)obj->async_rx_buff, in _cyhal_uart_dma_read_async()
1433 obj->async_rx_buff = ((length * (mem_width / 8)) + (char*)obj->async_rx_buff); in _cyhal_uart_dma_read_async()
1434 obj->async_rx_length -= length; in _cyhal_uart_dma_read_async()
1439 …result = _cyhal_scb_set_fifo_level(obj->base, (cyhal_scb_fifo_type_t)CYHAL_UART_FIFO_RX, length - … in _cyhal_uart_dma_read_async()
1442 …cyhal_dma_enable_event(&(obj->dma_rx), CYHAL_DMA_TRANSFER_COMPLETE, CYHAL_DMA_PRIORITY_DEFAULT, tr… in _cyhal_uart_dma_read_async()
1444 obj->dma_tx.descriptor_config.dw.retrigger = CY_DMA_WAIT_FOR_REACT; in _cyhal_uart_dma_read_async()
1446 result = cyhal_dma_configure(&(obj->dma_rx), &dma_config); in _cyhal_uart_dma_read_async()
1450 SCB_InvalidateDCache_by_Addr((void *)obj->async_rx_buff, (length * (mem_width / 8))); in _cyhal_uart_dma_read_async()
1455 result = cyhal_dma_enable(&(obj->dma_rx)); in _cyhal_uart_dma_read_async()
1462 cy_rslt_t cyhal_uart_read_async(cyhal_uart_t *obj, void *rx, size_t length) in cyhal_uart_read_async() argument
1469 if(obj->async_mode == CYHAL_ASYNC_DMA) in cyhal_uart_read_async()
1472 obj->async_rx_buff = rx; in cyhal_uart_read_async()
1473 obj->async_rx_length = length; in cyhal_uart_read_async()
1476 result = _cyhal_uart_dma_read_async(obj); in cyhal_uart_read_async()
1481 result = Cy_SCB_UART_Receive(obj->base, rx, length, &(obj->context)); in cyhal_uart_read_async()
1486 bool cyhal_uart_is_tx_active(cyhal_uart_t *obj) in cyhal_uart_is_tx_active() argument
1488 …return (0UL != (obj->context.txStatus & CY_SCB_UART_TRANSMIT_ACTIVE)) || !Cy_SCB_IsTxComplete(obj-… in cyhal_uart_is_tx_active()
1490 || (obj->async_tx_buff != NULL) in cyhal_uart_is_tx_active()
1495 bool cyhal_uart_is_rx_active(cyhal_uart_t *obj) in cyhal_uart_is_rx_active() argument
1497 return (0UL != (obj->context.rxStatus & CY_SCB_UART_RECEIVE_ACTIVE)) in cyhal_uart_is_rx_active()
1499 || (obj->async_rx_buff != NULL) in cyhal_uart_is_rx_active()
1504 cy_rslt_t cyhal_uart_write_abort(cyhal_uart_t *obj) in cyhal_uart_write_abort() argument
1507 if(obj->async_mode == CYHAL_ASYNC_DMA && (obj->async_tx_buff != NULL)) in cyhal_uart_write_abort()
1510 obj->async_tx_buff = NULL; in cyhal_uart_write_abort()
1511 …cyhal_dma_enable_event(&(obj->dma_tx), CYHAL_DMA_TRANSFER_COMPLETE, CYHAL_DMA_PRIORITY_DEFAULT, fa… in cyhal_uart_write_abort()
1512 cyhal_dma_disable(&(obj->dma_tx)); in cyhal_uart_write_abort()
1514 Cy_SCB_UART_ClearTxFifo(obj->base); in cyhal_uart_write_abort()
1519 Cy_SCB_UART_AbortTransmit(obj->base, &(obj->context)); in cyhal_uart_write_abort()
1524 cy_rslt_t cyhal_uart_read_abort(cyhal_uart_t *obj) in cyhal_uart_read_abort() argument
1527 if(obj->async_mode == CYHAL_ASYNC_DMA && (obj->async_rx_buff != NULL)) in cyhal_uart_read_abort()
1530 obj->async_rx_buff = NULL; in cyhal_uart_read_abort()
1531 …cyhal_dma_enable_event(&(obj->dma_rx), CYHAL_DMA_TRANSFER_COMPLETE, CYHAL_DMA_PRIORITY_DEFAULT, fa… in cyhal_uart_read_abort()
1532 cyhal_dma_disable(&(obj->dma_rx)); in cyhal_uart_read_abort()
1538 Cy_SCB_UART_AbortReceive(obj->base, &(obj->context)); in cyhal_uart_read_abort()
1543 void cyhal_uart_register_callback(cyhal_uart_t *obj, cyhal_uart_event_callback_t callback, void *ca… in cyhal_uart_register_callback() argument
1546 obj->callback_data.callback = (cy_israddress) callback; in cyhal_uart_register_callback()
1547 obj->callback_data.callback_arg = callback_arg; in cyhal_uart_register_callback()
1549 Cy_SCB_UART_RegisterCallback(obj->base, _cyhal_uart_cb_wrapper, &(obj->context)); in cyhal_uart_register_callback()
1551 obj->irq_cause = CYHAL_UART_IRQ_NONE; in cyhal_uart_register_callback()
1554 void cyhal_uart_enable_event(cyhal_uart_t *obj, cyhal_uart_event_t event, uint8_t intr_priority, bo… in cyhal_uart_enable_event() argument
1556 uint8_t scb_arr_index = _cyhal_scb_get_block_index(obj->resource.block_num); in cyhal_uart_enable_event()
1558 Cy_SCB_DisableInterrupt(obj->base); in cyhal_uart_enable_event()
1566 obj->irq_cause |= event; in cyhal_uart_enable_event()
1569 Cy_SCB_ClearTxInterrupt(obj->base, CY_SCB_UART_TX_EMPTY); in cyhal_uart_enable_event()
1570 … Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) | CY_SCB_UART_TX_EMPTY); in cyhal_uart_enable_event()
1574 Cy_SCB_ClearTxInterrupt(obj->base, CY_SCB_UART_TX_DONE); in cyhal_uart_enable_event()
1575 … Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) | CY_SCB_UART_TX_DONE); in cyhal_uart_enable_event()
1581 if(obj->config.uartMode == CY_SCB_UART_STANDARD) in cyhal_uart_enable_event()
1583 … Cy_SCB_ClearTxInterrupt(obj->base, (CY_SCB_UART_TX_OVERFLOW | CY_SCB_UART_TRANSMIT_ERR)); in cyhal_uart_enable_event()
1584 …Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) | (CY_SCB_UART_TX_OVERFL… in cyhal_uart_enable_event()
1587 else if(obj->config.uartMode == CY_SCB_UART_SMARTCARD) in cyhal_uart_enable_event()
1589 …Cy_SCB_ClearTxInterrupt(obj->base, (CY_SCB_UART_TX_OVERFLOW | CY_SCB_TX_INTR_UART_NACK | CY_SCB_TX… in cyhal_uart_enable_event()
1590 …Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) | (CY_SCB_UART_TX_OVERFL… in cyhal_uart_enable_event()
1595 …Cy_SCB_ClearTxInterrupt(obj->base, (CY_SCB_UART_TX_OVERFLOW | CY_SCB_TX_INTR_UART_ARB_LOST | CY_SC… in cyhal_uart_enable_event()
1596 …Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) | (CY_SCB_UART_TX_OVERFL… in cyhal_uart_enable_event()
1601 Cy_SCB_ClearTxInterrupt(obj->base, CY_SCB_UART_TX_TRIGGER); in cyhal_uart_enable_event()
1602 …Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) | CY_SCB_UART_TX_TRIGGER… in cyhal_uart_enable_event()
1607 Cy_SCB_ClearRxInterrupt(obj->base, CY_SCB_UART_RX_NOT_EMPTY); in cyhal_uart_enable_event()
1608 …Cy_SCB_SetRxInterruptMask(obj->base, Cy_SCB_GetRxInterruptMask(obj->base) | CY_SCB_UART_RX_NOT_EMP… in cyhal_uart_enable_event()
1613 Cy_SCB_ClearRxInterrupt(obj->base, CY_SCB_UART_RECEIVE_ERR); in cyhal_uart_enable_event()
1614 …Cy_SCB_SetRxInterruptMask(obj->base, Cy_SCB_GetRxInterruptMask(obj->base) | CY_SCB_UART_RECEIVE_ER… in cyhal_uart_enable_event()
1618 Cy_SCB_ClearRxInterrupt(obj->base, CY_SCB_UART_RX_TRIGGER); in cyhal_uart_enable_event()
1619 …Cy_SCB_SetRxInterruptMask(obj->base, Cy_SCB_GetRxInterruptMask(obj->base) | CY_SCB_UART_RX_TRIGGER… in cyhal_uart_enable_event()
1624 obj->irq_cause &= ~event; in cyhal_uart_enable_event()
1627 …Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) & ~CY_SCB_UART_TX_EMPTY); in cyhal_uart_enable_event()
1631 … Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) & ~CY_SCB_UART_TX_DONE); in cyhal_uart_enable_event()
1635 …Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) & ~(CY_SCB_UART_TX_OVERF… in cyhal_uart_enable_event()
1639 …Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) & ~CY_SCB_UART_TX_TRIGGE… in cyhal_uart_enable_event()
1644 …Cy_SCB_SetRxInterruptMask(obj->base, Cy_SCB_GetRxInterruptMask(obj->base) & ~CY_SCB_UART_RX_NOT_EM… in cyhal_uart_enable_event()
1648 …Cy_SCB_SetRxInterruptMask(obj->base, Cy_SCB_GetRxInterruptMask(obj->base) & ~CY_SCB_UART_RECEIVE_E… in cyhal_uart_enable_event()
1652 …Cy_SCB_SetRxInterruptMask(obj->base, Cy_SCB_GetRxInterruptMask(obj->base) & ~CY_SCB_UART_RX_TRIGGE… in cyhal_uart_enable_event()
1671 Cy_SCB_ClearRxInterrupt(obj->base, CY_SCB_RX_INTR_MASK); in cyhal_uart_enable_event()
1672 Cy_SCB_ClearTxInterrupt(obj->base, CY_SCB_TX_INTR_MASK); in cyhal_uart_enable_event()
1673 … Cy_SCB_SetRxInterruptMask(obj->base, Cy_SCB_GetRxInterruptMask(obj->base) & ~CY_SCB_RX_INTR_MASK); in cyhal_uart_enable_event()
1674 … Cy_SCB_SetTxInterruptMask(obj->base, Cy_SCB_GetTxInterruptMask(obj->base) & ~CY_SCB_TX_INTR_MASK); in cyhal_uart_enable_event()
1681 Cy_SCB_RegisterInterruptCallback(obj->base, _cyhal_irq_cb[_CYHAL_SCB_IRQ_N[scb_arr_index]]); in cyhal_uart_enable_event()
1682 Cy_SCB_EnableInterrupt(obj->base); in cyhal_uart_enable_event()
1686 cy_rslt_t cyhal_uart_set_fifo_level(cyhal_uart_t *obj, cyhal_uart_fifo_type_t type, uint16_t level) in cyhal_uart_set_fifo_level() argument
1688 cy_rslt_t result = _cyhal_scb_set_fifo_level(obj->base, (cyhal_scb_fifo_type_t)type, level); in cyhal_uart_set_fifo_level()
1693 obj->user_fifo_level = level; in cyhal_uart_set_fifo_level()
1699 cy_rslt_t cyhal_uart_enable_output(cyhal_uart_t *obj, cyhal_uart_output_t output, cyhal_source_t *s… in cyhal_uart_enable_output() argument
1701 return _cyhal_scb_enable_output(obj->resource, (cyhal_scb_output_t)output, source); in cyhal_uart_enable_output()
1704 cy_rslt_t cyhal_uart_disable_output(cyhal_uart_t *obj, cyhal_uart_output_t output) in cyhal_uart_disable_output() argument
1706 CY_UNUSED_PARAMETER(obj); in cyhal_uart_disable_output()
1710 cy_rslt_t cyhal_uart_config_software_buffer(cyhal_uart_t *obj, uint8_t *rx_buffer, uint32_t rx_buff… in cyhal_uart_config_software_buffer() argument
1713 CY_ASSERT(NULL != obj); in cyhal_uart_config_software_buffer()
1717 if(obj->async_mode == CYHAL_ASYNC_DMA) in cyhal_uart_config_software_buffer()
1725 Cy_SCB_UART_StartRingBuffer(obj->base, rx_buffer, rx_buffer_size, &(obj->context)); in cyhal_uart_config_software_buffer()