Lines Matching refs:tcpwm
74 #define _CYHAL_CNT_NUM _CYHAL_TCPWM_CNT_NUMBER(obj->tcpwm.resource)
81 static inline cy_rslt_t _cyhal_quaddec_configure_clock(cyhal_tcpwm_t *tcpwm, en_clk_dst_t pclk, uin… in _cyhal_quaddec_configure_clock() argument
95 …rslt = _cyhal_utils_allocate_clock(&tcpwm->clock, &tcpwm->resource, CYHAL_CLOCK_BLOCK_PERIPHERAL_1… in _cyhal_quaddec_configure_clock()
97 rslt = cyhal_clock_allocate(&tcpwm->clock, CYHAL_CLOCK_BLOCK_PERIPHERAL_16BIT); in _cyhal_quaddec_configure_clock()
107 tcpwm->dedicated_clock = true; in _cyhal_quaddec_configure_clock()
110 uint32_t current_freq = _cyhal_utils_get_peripheral_clock_frequency(&(tcpwm->resource)); in _cyhal_quaddec_configure_clock()
115 …_t)(_CYHAL_TCPWM_DATA[_CYHAL_TCPWM_ADJUST_BLOCK_INDEX(tcpwm->resource.block_num)].clock_dst + tcpw… in _cyhal_quaddec_configure_clock()
117 … if (_cyhal_utils_peri_pclk_set_divider(clk_dst, &tcpwm->clock, (divider - 1)) == CY_RSLT_SUCCESS) in _cyhal_quaddec_configure_clock()
123 if (cyhal_clock_set_frequency(&tcpwm->clock, frequency, &tolerance) == CY_RSLT_SUCCESS) in _cyhal_quaddec_configure_clock()
125 … if (_cyhal_utils_peri_pclk_assign_divider(pclk, &(tcpwm->clock)) == CY_SYSCLK_SUCCESS) in _cyhal_quaddec_configure_clock()
127 cyhal_clock_set_enabled(&tcpwm->clock, true, false); in _cyhal_quaddec_configure_clock()
245 rslt = cyhal_gpio_enable_output(pin, signal_type, &(obj->tcpwm.inputs[idx])); in _cyhal_quaddec_pin_init()
250 rslt = cyhal_quaddec_connect_digital(obj, obj->tcpwm.inputs[idx], input); in _cyhal_quaddec_pin_init()
253 obj->tcpwm.inputs[idx] = CYHAL_TRIGGER_CPUSS_ZERO; in _cyhal_quaddec_pin_init()
258 rslt = _cyhal_quaddec_connect_pin(input, pin, obj->tcpwm.base, in _cyhal_quaddec_pin_init()
259 obj->tcpwm.resource.channel_num); in _cyhal_quaddec_pin_init()
286 …obj->last_counter_value = 1 << (_CYHAL_TCPWM_DATA[_CYHAL_TCPWM_ADJUST_BLOCK_INDEX(obj->tcpwm.resou… in _cyhal_quaddec_init_hw()
288 …obj->tcpwm.base = _CYHAL_TCPWM_DATA[_CYHAL_TCPWM_ADJUST_BLOCK_INDEX(obj->tcpwm.resource.block_num)… in _cyhal_quaddec_init_hw()
289 _cyhal_tcpwm_init_data(&obj->tcpwm); in _cyhal_quaddec_init_hw()
291 cy_rslt_t rslt = Cy_TCPWM_QuadDec_Init(obj->tcpwm.base, _CYHAL_CNT_NUM, config); in _cyhal_quaddec_init_hw()
297 …_CYHAL_TCPWM_ADJUST_BLOCK_INDEX(obj->tcpwm.resource.block_num)].clock_dst + obj->tcpwm.resource.ch… in _cyhal_quaddec_init_hw()
307 obj->tcpwm.clock = *clk; in _cyhal_quaddec_init_hw()
309 … if (_cyhal_utils_peri_pclk_assign_divider(pclk, &(obj->tcpwm.clock)) != CY_SYSCLK_SUCCESS) in _cyhal_quaddec_init_hw()
317 rslt = _cyhal_quaddec_configure_clock(&obj->tcpwm, pclk, frequency); in _cyhal_quaddec_init_hw()
322 obj->tcpwm.clock_hz = cyhal_clock_get_frequency(&obj->tcpwm.clock); in _cyhal_quaddec_init_hw()
341 obj->tcpwm.resource.type = CYHAL_RSC_INVALID; in cyhal_quaddec_init()
375 NULL, NULL, _cyhal_quaddec_get_phy_a_input_dest, &obj->tcpwm.resource); in cyhal_quaddec_init()
381 rslt = cyhal_hwmgr_allocate(CYHAL_RSC_TCPWM, &obj->tcpwm.resource); in cyhal_quaddec_init()
412 obj->tcpwm.inputs[phy_a_idx] = phy_a_src;; in cyhal_quaddec_init()
413 …rslt = cyhal_quaddec_connect_digital(obj, obj->tcpwm.inputs[phy_a_idx], CYHAL_QUADDEC_INPUT_PHI_A); in cyhal_quaddec_init()
436 obj->tcpwm.inputs[idx] = CYHAL_TRIGGER_CPUSS_ZERO; in cyhal_quaddec_init()
444 Cy_TCPWM_QuadDec_Enable(obj->tcpwm.base, _CYHAL_CNT_NUM); in cyhal_quaddec_init()
461 obj->tcpwm.resource = *cfg->resource; in cyhal_quaddec_init_cfg()
462 obj->tcpwm.owned_by_configurator = true; in cyhal_quaddec_init_cfg()
470 Cy_TCPWM_QuadDec_Enable(obj->tcpwm.base, _CYHAL_CNT_NUM); in cyhal_quaddec_init_cfg()
485 if ((obj->phi_a != NC) && (obj->tcpwm.inputs[idx_phi_a] != CYHAL_TRIGGER_CPUSS_ZERO)) in cyhal_quaddec_free()
487 … cyhal_quaddec_disconnect_digital(obj, obj->tcpwm.inputs[idx_phi_a], CYHAL_QUADDEC_INPUT_PHI_A); in cyhal_quaddec_free()
490 if ((obj->phi_b != NC) && (obj->tcpwm.inputs[idx_phi_b] != CYHAL_TRIGGER_CPUSS_ZERO)) in cyhal_quaddec_free()
492 … cyhal_quaddec_disconnect_digital(obj, obj->tcpwm.inputs[idx_phi_b], CYHAL_QUADDEC_INPUT_PHI_B); in cyhal_quaddec_free()
495 if ((obj->index != NC) && (obj->tcpwm.inputs[idx_index] != CYHAL_TRIGGER_CPUSS_ZERO)) in cyhal_quaddec_free()
497 … cyhal_quaddec_disconnect_digital(obj, obj->tcpwm.inputs[idx_index], CYHAL_QUADDEC_INPUT_INDEX); in cyhal_quaddec_free()
503 if (obj->tcpwm.resource.type != CYHAL_RSC_INVALID) in cyhal_quaddec_free()
505 _cyhal_tcpwm_free(&obj->tcpwm); in cyhal_quaddec_free()
516 Cy_TCPWM_QuadDec_Enable(obj->tcpwm.base, _CYHAL_CNT_NUM); in cyhal_quaddec_start()
522 Cy_TCPWM_TriggerReloadOrIndex_Single(obj->tcpwm.base, _CYHAL_CNT_NUM); in cyhal_quaddec_start()
524 Cy_TCPWM_TriggerReloadOrIndex(obj->tcpwm.base, 1 << _CYHAL_CNT_NUM); in cyhal_quaddec_start()
527 …obj->last_counter_value = 1 << (_CYHAL_TCPWM_DATA[_CYHAL_TCPWM_ADJUST_BLOCK_INDEX(obj->tcpwm.resou… in cyhal_quaddec_start()
535 Cy_TCPWM_QuadDec_Disable(obj->tcpwm.base, _CYHAL_CNT_NUM); in cyhal_quaddec_stop()
543 …uint32_t midpoint = 1 << (_CYHAL_TCPWM_DATA[_CYHAL_TCPWM_ADJUST_BLOCK_INDEX(obj->tcpwm.resource.bl… in cyhal_quaddec_get_delta()
546 uint32_t current_counter_value = Cy_TCPWM_QuadDec_GetCounter(obj->tcpwm.base, _CYHAL_CNT_NUM); in cyhal_quaddec_get_delta()
570 return Cy_TCPWM_QuadDec_GetCounter(obj->tcpwm.base, _CYHAL_CNT_NUM); in cyhal_quaddec_read_counter()
577 return Cy_TCPWM_QuadDec_GetCapture0Val(obj->tcpwm.base, _CYHAL_CNT_NUM); in cyhal_quaddec_read_capture()
579 return Cy_TCPWM_QuadDec_GetCapture(obj->tcpwm.base, _CYHAL_CNT_NUM); in cyhal_quaddec_read_capture()
607 return _cyhal_tcpwm_connect_digital(&(obj->tcpwm), source, tcpwm_signal, edge_type); in cyhal_quaddec_connect_digital2()
628 return _cyhal_tcpwm_disconnect_digital(&(obj->tcpwm), source, in cyhal_quaddec_disconnect_digital()
671 …return _cyhal_tcpwm_enable_output(&(obj->tcpwm), _cyhal_quaddec_translate_output_signal(signal), s… in cyhal_quaddec_enable_output()
679 … return _cyhal_tcpwm_disable_output(&(obj->tcpwm), _cyhal_quaddec_translate_output_signal(signal)); in cyhal_quaddec_disable_output()