147 …_cyhal_dma_dw_config_structs[obj->resource.block_num * CPUSS_DW0_CH_NR + obj->resource.channel_num…  in _cyhal_dma_dw_set_obj()
153 …_cyhal_dma_dw_config_structs[obj->resource.block_num * CPUSS_DW0_CH_NR + obj->resource.channel_num…  in _cyhal_dma_dw_free_obj()
228 …  if (obj->resource.block_num == 0 && obj->resource.channel_num < CYHAL_DMA_DW0_MAX_CONTIGUOUS_IRQ)  in _cyhal_dma_dw_get_irqn()
237     else if ((obj->resource.block_num == 0 && obj->resource.channel_num < CPUSS_DW0_CH_NR))  in _cyhal_dma_dw_get_irqn()
244 …  if (obj->resource.block_num == 1 && obj->resource.channel_num < CYHAL_DMA_DW1_MAX_CONTIGUOUS_IRQ)  in _cyhal_dma_dw_get_irqn()
249     else if (obj->resource.block_num == 1 && obj->resource.channel_num < CPUSS_DW1_CH_NR)  in _cyhal_dma_dw_get_irqn()
265 static inline DW_Type* _cyhal_dma_dw_get_base(uint8_t block_num)  in _cyhal_dma_dw_get_base()  argument
268     return block_num == 0 ? DW0 : DW1;  in _cyhal_dma_dw_get_base()
270     CY_UNUSED_PARAMETER(block_num);  in _cyhal_dma_dw_get_base()
278 static inline uint32_t _cyhal_dma_dw_get_trigger_line(uint8_t block_num, uint8_t channel_num)  in _cyhal_dma_dw_get_trigger_line()  argument
284 …cyhal_dest_t trigger = (cyhal_dest_t)(CYHAL_TRIGGER_M33SYSCPUSS_DW0_TR_IN0 + (block_num * CPUSS_DW…  in _cyhal_dma_dw_get_trigger_line()
286 …cyhal_dest_t trigger = (cyhal_dest_t)(CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 + (block_num * CPUSS_DW0_CH_N…  in _cyhal_dma_dw_get_trigger_line()
364 static cyhal_source_t _cyhal_dma_dw_get_src(uint8_t block_num, uint8_t channel_num)  in _cyhal_dma_dw_get_src()  argument
367 …)_CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_M33SYSCPUSS_DW0_TR_OUT0 + (block_num * CPUSS_DW0_CH_N…  in _cyhal_dma_dw_get_src()
369 …urce_t)_CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0 + (block_num * CPUSS_DW0_CH_N…  in _cyhal_dma_dw_get_src()
373 static cyhal_dest_t _cyhal_dma_dw_get_dest(uint8_t block_num, uint8_t channel_num)  in _cyhal_dma_dw_get_dest()  argument
376 …return (cyhal_dest_t)(CYHAL_TRIGGER_M33SYSCPUSS_DW0_TR_IN0 + (block_num * CPUSS_DW0_CH_NR) + chann…  in _cyhal_dma_dw_get_dest()
378 …return (cyhal_dest_t)(CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 + (block_num * CPUSS_DW0_CH_NR) + channel_num…  in _cyhal_dma_dw_get_dest()
388     DW_Type* base = _cyhal_dma_dw_get_base(obj->resource.block_num);  in _cyhal_dma_dw_stage()
480 … Cy_DMA_Channel_DeInit(_cyhal_dma_dw_get_base(obj->resource.block_num), obj->resource.channel_num);  in _cyhal_dma_dw_free()
585     DW_Type* base = _cyhal_dma_dw_get_base(obj->resource.block_num);  in _cyhal_dma_dw_enable()
592     DW_Type* base = _cyhal_dma_dw_get_base(obj->resource.block_num);  in _cyhal_dma_dw_disable()
606 …uint32_t trigline = _cyhal_dma_dw_get_trigger_line(obj->resource.block_num, obj->resource.channel_…  in _cyhal_dma_dw_start_transfer()
633 …return _cyhal_dma_dw_get_base(obj->resource.block_num)->PENDING & (1 << obj->resource.channel_num);  in _cyhal_dma_dw_is_busy()
637 …return DW_CH_STATUS(_cyhal_dma_dw_get_base(obj->resource.block_num), obj->resource.channel_num) & …  in _cyhal_dma_dw_is_busy()
639 …return DW_CH_STATUS(_cyhal_dma_dw_get_base(obj->resource.block_num), obj->resource.channel_num) & …  in _cyhal_dma_dw_is_busy()
697     cyhal_dest_t dest = _cyhal_dma_dw_get_dest(obj->resource.block_num, obj->resource.channel_num);  in _cyhal_dma_dw_connect_digital()
721     *source = _cyhal_dma_dw_get_src(obj->resource.block_num, obj->resource.channel_num);  in _cyhal_dma_dw_enable_output()
743     cyhal_dest_t dest = _cyhal_dma_dw_get_dest(obj->resource.block_num, obj->resource.channel_num);  in _cyhal_dma_dw_disconnect_digital()