Lines Matching refs:SCU_GENERAL
259 return (uint32_t)(SCU_GENERAL->STCON & SCU_GENERAL_STCON_SWCON_Msk); in XMC_SCU_GetBootMode()
265 SCU_GENERAL->STCON = (uint32_t)bootmode; in XMC_SCU_SetBootMode()
271 return (SCU_GENERAL->GPR[index]); in XMC_SCU_ReadGPR()
277 SCU_GENERAL->GPR[index] = data; in XMC_SCU_WriteGPR()
286 SCU_GENERAL->GORCEN[group] |= (uint32_t)(1UL << channel); in XMC_SCU_EnableOutOfRangeComparator()
295 SCU_GENERAL->GORCEN[group] &= (uint32_t)~(1UL << channel); in XMC_SCU_DisableOutOfRangeComparator()
301 SCU_GENERAL->DTSCON = ((uint32_t)(offset << SCU_GENERAL_DTSCON_OFFSET_Pos) | in XMC_SCU_CalibrateTemperatureSensor()
309 SCU_GENERAL->DTSCON &= (uint32_t)~(SCU_GENERAL_DTSCON_PWD_Msk); in XMC_SCU_EnableTemperatureSensor()
315 SCU_GENERAL->DTSCON |= (uint32_t)SCU_GENERAL_DTSCON_PWD_Msk; in XMC_SCU_DisableTemperatureSensor()
321 return ((SCU_GENERAL->DTSCON & SCU_GENERAL_DTSCON_PWD_Msk) == 0U); in XMC_SCU_IsTemperatureSensorEnabled()
327 return ((SCU_GENERAL->DTSSTAT & SCU_GENERAL_DTSSTAT_RDY_Msk) != 0U); in XMC_SCU_IsTemperatureSensorReady()
345 SCU_GENERAL->DTSCON |= (uint32_t)SCU_GENERAL_DTSCON_START_Msk; in XMC_SCU_StartTemperatureMeasurement()
361 …temperature = (uint32_t)((SCU_GENERAL->DTSSTAT & SCU_GENERAL_DTSSTAT_RESULT_Msk) >> SCU_GENERAL_DT… in XMC_SCU_GetTemperatureMeasurement()
370 return ((SCU_GENERAL->DTSSTAT & SCU_GENERAL_DTSSTAT_BUSY_Msk) != 0U); in XMC_SCU_IsTemperatureSensorBusy()
381 dtscon = SCU_GENERAL->DTSCON; in XMC_SCU_HighTemperature()
395 dtempalarm = SCU_GENERAL->DTEMPALARM; in XMC_SCU_HighTemperature()
414 SCU_GENERAL->DTSCON &= (uint32_t)~SCU_GENERAL_DTSCON_PWD_Msk; in XMC_SCU_SetRawTempLimits()
415 SCU_GENERAL->DTEMPLIM = 0; in XMC_SCU_SetRawTempLimits()
416 SCU_GENERAL->DTEMPLIM = (lower_temp & SCU_GENERAL_DTEMPLIM_LOWER_Msk); in XMC_SCU_SetRawTempLimits()
417 …SCU_GENERAL->DTEMPLIM |= (uint32_t)((upper_temp & SCU_GENERAL_DTEMPLIM_LOWER_Msk) << SCU_GENERAL_D… in XMC_SCU_SetRawTempLimits()
426 dtscon = SCU_GENERAL->DTSCON; in XMC_SCU_LowTemperature()
440 dtempalarm = SCU_GENERAL->DTEMPALARM; in XMC_SCU_LowTemperature()
469 SCU_GENERAL->RMDATA = data; in XMC_SCU_WriteToRetentionMemory()
472 SCU_GENERAL->RMACR = rmacr; in XMC_SCU_WriteToRetentionMemory()
475 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_RMX_Msk) in XMC_SCU_WriteToRetentionMemory()
492 SCU_GENERAL->RMACR = rmacr; in XMC_SCU_ReadFromRetentionMemory()
495 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_RMX_Msk) in XMC_SCU_ReadFromRetentionMemory()
499 return (SCU_GENERAL->RMDATA); in XMC_SCU_ReadFromRetentionMemory()
948 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_SetRtcClockSource()
959 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_SetStandbyClockSource()
1251 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCSICTRL_Msk) in XMC_SCU_HIB_EnableInternalSlowClock()
1261 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCSICTRL_Msk) in XMC_SCU_HIB_DisableInternalSlowClock()
1270 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCLR_Msk) in XMC_SCU_HIB_ClearEventStatus()
1279 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDSET_Msk) in XMC_SCU_HIB_TriggerEvent()
1299 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_EnableEvent()
1319 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_DisableEvent()
1328 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_EnterHibernateState()
1344 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HINTSET_Msk) in XMC_SCU_HIB_EnterHibernateStateEx()
1355 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_SetWakeupTriggerInput()
1372 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_SetPinMode()
1382 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_SetPinOutputLevel()
1392 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_SetInput0()
1409 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_SetSR0Input()
1426 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) in XMC_SCU_HIB_SetSR1Input()
1437 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACCONF_Msk) in XMC_SCU_HIB_LPAC_SetInput()
1447 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACCONF_Msk) in XMC_SCU_HIB_LPAC_SetTrigger()
1467 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACCONF_Msk) in XMC_SCU_HIB_LPAC_SetTiming()
1482 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACTH0_Msk) in XMC_SCU_HIB_LPAC_SetVBATThresholds()
1496 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACTH1_Msk) in XMC_SCU_HIB_LPAC_SetHIBIO0Thresholds()
1510 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACTH1_Msk) in XMC_SCU_HIB_LPAC_SetHIBIO1Thresholds()
1528 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACCLR_Msk) in XMC_SCU_HIB_LPAC_ClearStatus()
1537 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACSET_Msk) in XMC_SCU_HIB_LPAC_TriggerCompare()
1574 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) in XMC_SCU_CLOCK_DisableLowPowerOscillator()
1583 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) in XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput()
1592 while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) in XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput()