Lines Matching refs:uint32_t

271   __IO uint32_t  SAR;
272 __I uint32_t RESERVED0;
273 __IO uint32_t DAR;
274 __I uint32_t RESERVED1;
275 __IO uint32_t LLP;
276 __I uint32_t RESERVED2;
277 __IO uint32_t CTLL;
278 __IO uint32_t CTLH;
279 __IO uint32_t SSTAT;
280 __I uint32_t RESERVED3;
281 __IO uint32_t DSTAT;
282 __I uint32_t RESERVED4;
283 __IO uint32_t SSTATAR;
284 __I uint32_t RESERVED5;
285 __IO uint32_t DSTATAR;
286 __I uint32_t RESERVED6;
287 __IO uint32_t CFGL;
288 __IO uint32_t CFGH;
289 __IO uint32_t SGR;
290 __I uint32_t RESERVED7;
291 __IO uint32_t DSR;
292 __I uint32_t RESERVED8;
305 __IO uint32_t RAWCHEV[10];
306 __I uint32_t STATUSCHEV[10];
307 __IO uint32_t MASKCHEV[10];
308 __O uint32_t CLEARCHEV[10];
309 __I uint32_t STATUSGLEV;
310 __I uint32_t RESERVED20;
311 __IO uint32_t REQSRCREG;
312 __I uint32_t RESERVED21;
313 __IO uint32_t REQDSTREG;
314 __I uint32_t RESERVED22;
315 __IO uint32_t SGLREQSRCREG;
316 __I uint32_t RESERVED23;
317 __IO uint32_t SGLREQDSTREG;
318 __I uint32_t RESERVED24;
319 __IO uint32_t LSTSRCREG;
320 __I uint32_t RESERVED25;
321 __IO uint32_t LSTDSTREG;
322 __I uint32_t RESERVED26;
323 __IO uint32_t DMACFGREG;
324 __I uint32_t RESERVED27;
325 __IO uint32_t CHENREG;
326 __I uint32_t RESERVED28;
327 __I uint32_t ID;
328 __I uint32_t RESERVED29[19];
329 __I uint32_t TYPE;
330 __I uint32_t VERSION;
347 uint32_t src_addr; /**< Source address */
348 uint32_t dst_addr; /**< Destination address */
354 uint32_t enable_interrupt: 1; /**< Enable interrupts? */
355uint32_t dst_transfer_width: 3; /**< Destination transfer width (:: XMC_DMA_CH_TRANSFER_…
356uint32_t src_transfer_width: 3; /**< Source transfer width (:: XMC_DMA_CH_TRANSFER_WIDTH…
357uint32_t dst_address_count_mode: 2; /**< Destination address count mode (:: XMC_DMA_CH_ADDRE…
358uint32_t src_address_count_mode: 2; /**< Source address count mode (:: XMC_DMA_CH_ADDRESS_CO…
359uint32_t dst_burst_length: 3; /**< Destination burst length (:: XMC_DMA_CH_BURST_LENGT…
360uint32_t src_burst_length: 3; /**< Source burst length (:: XMC_DMA_CH_BURST_LENGTH_t) …
361 uint32_t enable_src_gather: 1; /**< Enable source gather? */
362 uint32_t enable_dst_scatter: 1; /**< Enable destination scatter? */
363 uint32_t : 1; /**< Reserved bits */
364uint32_t transfer_flow: 3; /**< DMA transfer flow (:: XMC_DMA_CH_TRANSFER_FLOW_t) */
365 uint32_t : 4; /**< Reserved bits */
366 uint32_t enable_dst_linked_list: 1; /**< Enable destination linked list? */
367 uint32_t enable_src_linked_list: 1; /**< Enable source linked list? */
368 uint32_t : 3; /**< Reserved bits */
370 uint32_t control;
372 uint32_t block_size; /**< Transfer block size */
373 uint32_t src_status; /**< Source status */
374 uint32_t dst_status; /**< Destination status */
386 uint32_t control;
389 uint32_t enable_interrupt: 1; /**< Enable interrupts? */
390uint32_t dst_transfer_width: 3; /**< Destination transfer width (:: XMC_DMA_CH_TRANSFER_…
391uint32_t src_transfer_width: 3; /**< Source transfer width (:: XMC_DMA_CH_TRANSFER_WIDTH…
392uint32_t dst_address_count_mode: 2; /**< Destination address count mode (:: XMC_DMA_CH_ADDRE…
393uint32_t src_address_count_mode: 2; /**< Source address count mode (:: XMC_DMA_CH_ADDRESS_CO…
394uint32_t dst_burst_length: 3; /**< Destination burst length (:: XMC_DMA_CH_BURST_LENGT…
395uint32_t src_burst_length: 3; /**< Source burst length (:: XMC_DMA_CH_BURST_LENGTH_t) …
396 uint32_t enable_src_gather: 1; /**< Enable source gather? */
397 uint32_t enable_dst_scatter: 1; /**< Enable destination scatter? */
398 uint32_t : 1;
399uint32_t transfer_flow: 3; /**< DMA transfer flow (:: XMC_DMA_CH_TRANSFER_FLOW_t) */
400 uint32_t : 9;
404 uint32_t src_addr; /**< Source address */
405 uint32_t dst_addr; /**< Destination address */
410 uint32_t src_gather_control;
413 uint32_t src_gather_interval: 20; /**< Source gather interval */
414 uint32_t src_gather_count: 12; /**< Source gather count */
420 uint32_t dst_scatter_control;
423 uint32_t dst_scatter_interval: 20; /**< Destination scatter interval */
424 uint32_t dst_scatter_count: 12; /**< Destination scatter count */
533 __STATIC_INLINE uint32_t XMC_DMA_GetEventStatus(XMC_DMA_t *const dma) in XMC_DMA_GetEventStatus()
548 __STATIC_INLINE uint32_t XMC_DMA_GetChannelsTransferCompleteStatus(XMC_DMA_t *const dma) in XMC_DMA_GetChannelsTransferCompleteStatus()
563 __STATIC_INLINE uint32_t XMC_DMA_GetChannelsBlockCompleteStatus(XMC_DMA_t *const dma) in XMC_DMA_GetChannelsBlockCompleteStatus()
582 __STATIC_INLINE uint32_t XMC_DMA_GetChannelsSourceTransactionCompleteStatus(XMC_DMA_t *const dma) in XMC_DMA_GetChannelsSourceTransactionCompleteStatus()
601 __STATIC_INLINE uint32_t XMC_DMA_GetChannelsDestinationTransactionCompleteStatus(XMC_DMA_t *const d… in XMC_DMA_GetChannelsDestinationTransactionCompleteStatus()
616 __STATIC_INLINE uint32_t XMC_DMA_GetChannelsErrorStatus(XMC_DMA_t *const dma) in XMC_DMA_GetChannelsErrorStatus()
744 dma->CHENREG = (uint32_t)(0x101UL << channel); in XMC_DMA_CH_Enable()
827 …INLINE void XMC_DMA_CH_SetSourceAddress(XMC_DMA_t *const dma, const uint8_t channel, uint32_t addr) in XMC_DMA_CH_SetSourceAddress()
848 …E void XMC_DMA_CH_SetDestinationAddress(XMC_DMA_t *const dma, const uint8_t channel, uint32_t addr) in XMC_DMA_CH_SetDestinationAddress()
867 __STATIC_INLINE void XMC_DMA_CH_SetBlockSize(XMC_DMA_t *const dma, const uint8_t channel, uint32_t in XMC_DMA_CH_SetBlockSize()
888 dma->CH[channel].LLP = (uint32_t)ll_ptr; in XMC_DMA_CH_SetLinkedListPointer()
932 void XMC_DMA_CH_EnableEvent(XMC_DMA_t *const dma, const uint8_t channel, const uint32_t event);
955 void XMC_DMA_CH_DisableEvent(XMC_DMA_t *const dma, const uint8_t channel, const uint32_t event);
981 void XMC_DMA_CH_ClearEventStatus(XMC_DMA_t *const dma, const uint8_t channel, const uint32_t event);
1008 uint32_t XMC_DMA_CH_GetEventStatus(XMC_DMA_t *const dma, const uint8_t channel);
1027 void XMC_DMA_CH_EnableSourceGather(XMC_DMA_t *const dma, const uint8_t channel, uint32_t interval, …
1060 void XMC_DMA_CH_EnableDestinationScatter(XMC_DMA_t *const dma, const uint8_t channel, uint32_t inte…
1297 __STATIC_INLINE uint32_t XMC_DMA_CH_GetTransferredData(XMC_DMA_t *const dma, const uint8_t channel) in XMC_DMA_CH_GetTransferredData()