205 void XMC_DMA_EnableRequestLine(XMC_DMA_t *const dma, uint8_t line, uint8_t peripheral)  in XMC_DMA_EnableRequestLine()  argument
213     DLR->SRSEL0 = ((DLR->SRSEL0 & (uint32_t)~(DLR_SRSEL_RS_MSK << (line * DLR_SRSEL_RS_BITSIZE))) |  in XMC_DMA_EnableRequestLine()
214                    ((uint32_t)peripheral << (line * DLR_SRSEL_RS_BITSIZE)));  in XMC_DMA_EnableRequestLine()
215     DLR->LNEN |= (0x1UL << (line & GPDMA0_CH_CFGH_PER_Msk));  in XMC_DMA_EnableRequestLine()
220     DLR->SRSEL1 = ((DLR->SRSEL1 & (uint32_t)~(DLR_SRSEL_RS_MSK << (line * DLR_SRSEL_RS_BITSIZE))) |  in XMC_DMA_EnableRequestLine()
221                    ((uint32_t)peripheral << (line * DLR_SRSEL_RS_BITSIZE)));  in XMC_DMA_EnableRequestLine()
222     DLR->LNEN |= (0x100UL << line);  in XMC_DMA_EnableRequestLine()
227 void XMC_DMA_DisableRequestLine(XMC_DMA_t *const dma, uint8_t line)  in XMC_DMA_DisableRequestLine()  argument
235     DLR->LNEN &= ~(0x1UL << line);  in XMC_DMA_DisableRequestLine()
240     DLR->LNEN &= ~(0x100UL << line);  in XMC_DMA_DisableRequestLine()
245 void XMC_DMA_ClearRequestLine(XMC_DMA_t *const dma, uint8_t line)  in XMC_DMA_ClearRequestLine()  argument
253     DLR->LNEN &= ~(0x1UL << line);  in XMC_DMA_ClearRequestLine()
254 	DLR->LNEN |= 0x1UL << line;  in XMC_DMA_ClearRequestLine()
259     DLR->LNEN &= ~(0x100UL << line);  in XMC_DMA_ClearRequestLine()
260 	DLR->LNEN |= 0x100UL << line;  in XMC_DMA_ClearRequestLine()
266 bool XMC_DMA_GetOverrunStatus(XMC_DMA_t *const dma, uint8_t line)  in XMC_DMA_GetOverrunStatus()  argument
276     status = (bool)(DLR->OVRSTAT & (0x1UL << line));  in XMC_DMA_GetOverrunStatus()
281     status = (bool)(DLR->OVRSTAT & (0x100UL << line));  in XMC_DMA_GetOverrunStatus()
289 void XMC_DMA_ClearOverrunStatus(XMC_DMA_t *const dma, const uint8_t line)  in XMC_DMA_ClearOverrunStatus()  argument
297     DLR->OVRCLR = (uint32_t)(0x1UL << line);  in XMC_DMA_ClearOverrunStatus()
302     DLR->OVRCLR = (uint32_t)(0x100UL << line);  in XMC_DMA_ClearOverrunStatus()
327   uint8_t line;  in XMC_DMA_CH_Init()  local
361             line = config->dst_peripheral_request & GPDMA0_CH_CFGH_PER_Msk;  in XMC_DMA_CH_Init()
366             line = config->dst_peripheral_request & GPDMA1_CH_CFGH_PER_Msk;  in XMC_DMA_CH_Init()
371           dma->CH[channel].CFGH |= (uint32_t)((uint32_t)line << GPDMA0_CH_CFGH_DEST_PER_Pos);  in XMC_DMA_CH_Init()
372           XMC_DMA_EnableRequestLine(dma, line, peripheral);  in XMC_DMA_CH_Init()
387             line = config->src_peripheral_request & GPDMA0_CH_CFGH_PER_Msk;  in XMC_DMA_CH_Init()
392             line = config->src_peripheral_request & GPDMA1_CH_CFGH_PER_Msk;  in XMC_DMA_CH_Init()
397           dma->CH[channel].CFGH |= (uint32_t)((uint32_t)line << GPDMA0_CH_CFGH_SRC_PER_Pos);  in XMC_DMA_CH_Init()
398           XMC_DMA_EnableRequestLine(dma, line, peripheral);  in XMC_DMA_CH_Init()
656   uint32_t line;  in XMC_DMA_CH_ClearSourcePeripheralRequest()  local
657   line = (dma->CH[channel].CFGH & GPDMA0_CH_CFGH_SRC_PER_Msk) >> GPDMA0_CH_CFGH_SRC_PER_Pos;  in XMC_DMA_CH_ClearSourcePeripheralRequest()
659   XMC_DMA_ClearRequestLine(dma, (uint8_t)line);  in XMC_DMA_CH_ClearSourcePeripheralRequest()
664   uint32_t line;  in XMC_DMA_CH_ClearDestinationPeripheralRequest()  local
665   line = (dma->CH[channel].CFGH & GPDMA0_CH_CFGH_DEST_PER_Msk) >> GPDMA0_CH_CFGH_DEST_PER_Pos;  in XMC_DMA_CH_ClearDestinationPeripheralRequest()
667   XMC_DMA_ClearRequestLine(dma, (uint8_t)line);  in XMC_DMA_CH_ClearDestinationPeripheralRequest()