59 void spi_i2s_deinit(uint32_t spi_periph)  in spi_i2s_deinit()  argument
61     switch(spi_periph){  in spi_i2s_deinit()
116 void spi_init(uint32_t spi_periph, spi_parameter_struct* spi_struct)  in spi_init()  argument
119     reg = SPI_CTL0(spi_periph);  in spi_init()
138     SPI_CTL0(spi_periph) = (uint32_t)reg;  in spi_init()
140     SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SSEL);  in spi_init()
149 void spi_enable(uint32_t spi_periph)  in spi_enable()  argument
151     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SPIEN;  in spi_enable()
160 void spi_disable(uint32_t spi_periph)  in spi_disable()  argument
162     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SPIEN);  in spi_disable()
188 void i2s_init(uint32_t spi_periph, uint32_t mode, uint32_t standard, uint32_t ckpl)  in i2s_init()  argument
191     reg = SPI_I2SCTL(spi_periph);  in i2s_init()
204     SPI_I2SCTL(spi_periph) = (uint32_t)reg;  in i2s_init()
234 void i2s_psc_config(uint32_t spi_periph, uint32_t audiosample, uint32_t frameformat, uint32_t mckou…  in i2s_psc_config()  argument
241     SPI_I2SPSC(spi_periph) = SPI_I2SPSC_DEFAULT_VALUE;  in i2s_psc_config()
244     if(SPI1 == ((uint32_t)spi_periph)){  in i2s_psc_config()
298     SPI_I2SPSC(spi_periph) = (uint32_t)(i2sdiv | i2sof | mckout);  in i2s_psc_config()
301     SPI_I2SCTL(spi_periph) &= (uint32_t)(~(SPI_I2SCTL_DTLEN | SPI_I2SCTL_CHLEN));  in i2s_psc_config()
303     SPI_I2SCTL(spi_periph) |= (uint32_t)frameformat;  in i2s_psc_config()
312 void i2s_enable(uint32_t spi_periph)  in i2s_enable()  argument
314     SPI_I2SCTL(spi_periph) |= (uint32_t)SPI_I2SCTL_I2SEN;  in i2s_enable()
323 void i2s_disable(uint32_t spi_periph)  in i2s_disable()  argument
325     SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SEN);  in i2s_disable()
334 void spi_nss_output_enable(uint32_t spi_periph)  in spi_nss_output_enable()  argument
336     SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV;  in spi_nss_output_enable()
345 void spi_nss_output_disable(uint32_t spi_periph)  in spi_nss_output_disable()  argument
347     SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV);  in spi_nss_output_disable()
356 void spi_nss_internal_high(uint32_t spi_periph)  in spi_nss_internal_high()  argument
358     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SWNSS;  in spi_nss_internal_high()
367 void spi_nss_internal_low(uint32_t spi_periph)  in spi_nss_internal_low()  argument
369     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SWNSS);  in spi_nss_internal_low()
382 void spi_dma_enable(uint32_t spi_periph, uint8_t dma)  in spi_dma_enable()  argument
385         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMATEN;  in spi_dma_enable()
387         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMAREN;  in spi_dma_enable()
401 void spi_dma_disable(uint32_t spi_periph, uint8_t dma)  in spi_dma_disable()  argument
404         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMATEN);  in spi_dma_disable()
406         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMAREN);  in spi_dma_disable()
420 void spi_i2s_data_frame_format_config(uint32_t spi_periph, uint16_t frame_format)  in spi_i2s_data_frame_format_config()  argument
423     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_FF16);  in spi_i2s_data_frame_format_config()
425     SPI_CTL0(spi_periph) |= (uint32_t)frame_format;  in spi_i2s_data_frame_format_config()
435 void spi_i2s_data_transmit(uint32_t spi_periph, uint16_t data)  in spi_i2s_data_transmit()  argument
437     SPI_DATA(spi_periph) = (uint32_t)data;  in spi_i2s_data_transmit()
446 uint16_t spi_i2s_data_receive(uint32_t spi_periph)  in spi_i2s_data_receive()  argument
448     return ((uint16_t)SPI_DATA(spi_periph));  in spi_i2s_data_receive()
461 void spi_bidirectional_transfer_config(uint32_t spi_periph, uint32_t transfer_direction)  in spi_bidirectional_transfer_config()  argument
465         SPI_CTL0(spi_periph) |= (uint32_t)SPI_BIDIRECTIONAL_TRANSMIT;  in spi_bidirectional_transfer_config()
468         SPI_CTL0(spi_periph) &= SPI_BIDIRECTIONAL_RECEIVE;  in spi_bidirectional_transfer_config()
479 void spi_crc_polynomial_set(uint32_t spi_periph,uint16_t crc_poly)  in spi_crc_polynomial_set()  argument
482     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCEN;  in spi_crc_polynomial_set()
485     SPI_CRCPOLY(spi_periph) = (uint32_t)crc_poly;  in spi_crc_polynomial_set()
494 uint16_t spi_crc_polynomial_get(uint32_t spi_periph)  in spi_crc_polynomial_get()  argument
496     return ((uint16_t)SPI_CRCPOLY(spi_periph));  in spi_crc_polynomial_get()
505 void spi_crc_on(uint32_t spi_periph)  in spi_crc_on()  argument
507     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCEN;  in spi_crc_on()
516 void spi_crc_off(uint32_t spi_periph)  in spi_crc_off()  argument
518     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_CRCEN);  in spi_crc_off()
527 void spi_crc_next(uint32_t spi_periph)  in spi_crc_next()  argument
529     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCNT;  in spi_crc_next()
542 uint16_t spi_crc_get(uint32_t spi_periph,uint8_t crc)  in spi_crc_get()  argument
545         return ((uint16_t)(SPI_TCRC(spi_periph)));  in spi_crc_get()
547         return ((uint16_t)(SPI_RCRC(spi_periph)));  in spi_crc_get()
557 void spi_ti_mode_enable(uint32_t spi_periph)  in spi_ti_mode_enable()  argument
559     SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TMOD;  in spi_ti_mode_enable()
568 void spi_ti_mode_disable(uint32_t spi_periph)  in spi_ti_mode_disable()  argument
570     SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TMOD);  in spi_ti_mode_disable()
579 void spi_nssp_mode_enable(uint32_t spi_periph)  in spi_nssp_mode_enable()  argument
581     SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSP;  in spi_nssp_mode_enable()
590 void spi_nssp_mode_disable(uint32_t spi_periph)  in spi_nssp_mode_disable()  argument
592     SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSP);  in spi_nssp_mode_disable()
608 void spi_i2s_interrupt_enable(uint32_t spi_periph, uint8_t interrupt)  in spi_i2s_interrupt_enable()  argument
613         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE;  in spi_i2s_interrupt_enable()
617         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE;  in spi_i2s_interrupt_enable()
621         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_ERRIE;  in spi_i2s_interrupt_enable()
640 void spi_i2s_interrupt_disable(uint32_t spi_periph, uint8_t interrupt)  in spi_i2s_interrupt_disable()  argument
645         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE);  in spi_i2s_interrupt_disable()
649         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE);  in spi_i2s_interrupt_disable()
653         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_ERRIE);  in spi_i2s_interrupt_disable()
675 FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt)  in spi_i2s_interrupt_flag_get()  argument
677     uint32_t reg1 = SPI_STAT(spi_periph);  in spi_i2s_interrupt_flag_get()
678     uint32_t reg2 = SPI_CTL1(spi_periph);  in spi_i2s_interrupt_flag_get()
749 FlagStatus spi_i2s_flag_get(uint32_t spi_periph, uint32_t flag)  in spi_i2s_flag_get()  argument
751     if(RESET != (SPI_STAT(spi_periph) & flag)){  in spi_i2s_flag_get()
764 void spi_crc_error_clear(uint32_t spi_periph)  in spi_crc_error_clear()  argument
766     SPI_STAT(spi_periph) &= (uint32_t)(~SPI_FLAG_CRCERR);  in spi_crc_error_clear()