Lines Matching refs:SPI_CTL1
136 reg3 = SPI_CTL1(spi_periph); in spi_init()
182 SPI_CTL1(spi_periph) = (uint32_t)reg3; in spi_init()
389 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
400 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
438 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMATEN; in spi_dma_enable()
440 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMAREN; in spi_dma_enable()
457 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMATEN); in spi_dma_disable()
459 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMAREN); in spi_dma_disable()
486 reg = SPI_CTL1(spi_periph); in spi_i2s_data_frame_format_config()
491 SPI_CTL1(spi_periph) = reg; in spi_i2s_data_frame_format_config()
623 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TMOD; in spi_ti_mode_enable()
634 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TMOD); in spi_ti_mode_disable()
645 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSP; in spi_nssp_mode_enable()
656 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSP); in spi_nssp_mode_disable()
739 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_BYTEN); in spi_fifo_access_size_config()
741 SPI_CTL1(spi_periph) |= (uint32_t)fifo_access_size; in spi_fifo_access_size_config()
757 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TXDMA_ODD); in spi_transmit_odd_config()
759 SPI_CTL1(spi_periph) |= (uint32_t)odd; in spi_transmit_odd_config()
775 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RXDMA_ODD); in spi_receive_odd_config()
777 SPI_CTL1(spi_periph) |= (uint32_t)odd; in spi_receive_odd_config()
815 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE; in spi_i2s_interrupt_enable()
819 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE; in spi_i2s_interrupt_enable()
823 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_ERRIE; in spi_i2s_interrupt_enable()
847 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE); in spi_i2s_interrupt_disable()
851 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE); in spi_i2s_interrupt_disable()
855 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_ERRIE); in spi_i2s_interrupt_disable()
880 uint32_t reg2 = SPI_CTL1(spi_periph); in spi_i2s_interrupt_flag_get()