56 void spi_i2s_deinit(uint32_t spi_periph)  in spi_i2s_deinit()  argument
58     switch(spi_periph) {  in spi_i2s_deinit()
128 void spi_init(uint32_t spi_periph, spi_parameter_struct *spi_struct)  in spi_init()  argument
131     reg = SPI_CTL0(spi_periph);  in spi_init()
150     SPI_CTL0(spi_periph) = (uint32_t)reg;  in spi_init()
152     SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SSEL);  in spi_init()
161 void spi_enable(uint32_t spi_periph)  in spi_enable()  argument
163     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SPIEN;  in spi_enable()
172 void spi_disable(uint32_t spi_periph)  in spi_disable()  argument
174     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SPIEN);  in spi_disable()
200 void i2s_init(uint32_t spi_periph, uint32_t i2s_mode, uint32_t i2s_standard, uint32_t i2s_ckpl)  in i2s_init()  argument
203     reg = SPI_I2SCTL(spi_periph);  in i2s_init()
216     SPI_I2SCTL(spi_periph) = (uint32_t)reg;  in i2s_init()
246 void i2s_psc_config(uint32_t spi_periph, uint32_t i2s_audiosample, uint32_t i2s_frameformat, uint32…  in i2s_psc_config()  argument
257     SPI_I2SPSC(spi_periph) = SPI_I2SPSC_DEFAULT_VALUE;  in i2s_psc_config()
316     SPI_I2SPSC(spi_periph) = (uint32_t)(i2sdiv | i2sof | i2s_mckout);  in i2s_psc_config()
319     SPI_I2SCTL(spi_periph) &= (uint32_t)(~(SPI_I2SCTL_DTLEN | SPI_I2SCTL_CHLEN));  in i2s_psc_config()
321     SPI_I2SCTL(spi_periph) |= (uint32_t)i2s_frameformat;  in i2s_psc_config()
330 void i2s_enable(uint32_t spi_periph)  in i2s_enable()  argument
332     SPI_I2SCTL(spi_periph) |= (uint32_t)SPI_I2SCTL_I2SEN;  in i2s_enable()
341 void i2s_disable(uint32_t spi_periph)  in i2s_disable()  argument
343     SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SEN);  in i2s_disable()
352 void spi_nss_output_enable(uint32_t spi_periph)  in spi_nss_output_enable()  argument
354     SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV;  in spi_nss_output_enable()
363 void spi_nss_output_disable(uint32_t spi_periph)  in spi_nss_output_disable()  argument
365     SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV);  in spi_nss_output_disable()
374 void spi_nss_internal_high(uint32_t spi_periph)  in spi_nss_internal_high()  argument
376     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SWNSS;  in spi_nss_internal_high()
385 void spi_nss_internal_low(uint32_t spi_periph)  in spi_nss_internal_low()  argument
387     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SWNSS);  in spi_nss_internal_low()
400 void spi_dma_enable(uint32_t spi_periph, uint8_t spi_dma)  in spi_dma_enable()  argument
403         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMATEN;  in spi_dma_enable()
405         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMAREN;  in spi_dma_enable()
419 void spi_dma_disable(uint32_t spi_periph, uint8_t spi_dma)  in spi_dma_disable()  argument
422         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMATEN);  in spi_dma_disable()
424         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMAREN);  in spi_dma_disable()
438 void spi_i2s_data_frame_format_config(uint32_t spi_periph, uint16_t frame_format)  in spi_i2s_data_frame_format_config()  argument
441     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_FF16);  in spi_i2s_data_frame_format_config()
443     SPI_CTL0(spi_periph) |= (uint32_t)frame_format;  in spi_i2s_data_frame_format_config()
453 void spi_i2s_data_transmit(uint32_t spi_periph, uint16_t data)  in spi_i2s_data_transmit()  argument
455     SPI_DATA(spi_periph) = (uint32_t)data;  in spi_i2s_data_transmit()
464 uint16_t spi_i2s_data_receive(uint32_t spi_periph)  in spi_i2s_data_receive()  argument
466     return ((uint16_t)SPI_DATA(spi_periph));  in spi_i2s_data_receive()
478 void spi_bidirectional_transfer_config(uint32_t spi_periph, uint32_t transfer_direction)  in spi_bidirectional_transfer_config()  argument
482         SPI_CTL0(spi_periph) |= (uint32_t)SPI_BIDIRECTIONAL_TRANSMIT;  in spi_bidirectional_transfer_config()
485         SPI_CTL0(spi_periph) &= SPI_BIDIRECTIONAL_RECEIVE;  in spi_bidirectional_transfer_config()
496 void spi_crc_polynomial_set(uint32_t spi_periph, uint16_t crc_poly)  in spi_crc_polynomial_set()  argument
499     SPI_CRCPOLY(spi_periph) = (uint32_t)crc_poly;  in spi_crc_polynomial_set()
508 uint16_t spi_crc_polynomial_get(uint32_t spi_periph)  in spi_crc_polynomial_get()  argument
510     return ((uint16_t)SPI_CRCPOLY(spi_periph));  in spi_crc_polynomial_get()
519 void spi_crc_on(uint32_t spi_periph)  in spi_crc_on()  argument
521     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCEN;  in spi_crc_on()
530 void spi_crc_off(uint32_t spi_periph)  in spi_crc_off()  argument
532     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_CRCEN);  in spi_crc_off()
541 void spi_crc_next(uint32_t spi_periph)  in spi_crc_next()  argument
543     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCNT;  in spi_crc_next()
556 uint16_t spi_crc_get(uint32_t spi_periph, uint8_t spi_crc)  in spi_crc_get()  argument
559         return ((uint16_t)(SPI_TCRC(spi_periph)));  in spi_crc_get()
561         return ((uint16_t)(SPI_RCRC(spi_periph)));  in spi_crc_get()
571 void spi_ti_mode_enable(uint32_t spi_periph)  in spi_ti_mode_enable()  argument
573     SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TMOD;  in spi_ti_mode_enable()
582 void spi_ti_mode_disable(uint32_t spi_periph)  in spi_ti_mode_disable()  argument
584     SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TMOD);  in spi_ti_mode_disable()
648 void qspi_enable(uint32_t spi_periph)  in qspi_enable()  argument
650     SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QMOD;  in qspi_enable()
659 void qspi_disable(uint32_t spi_periph)  in qspi_disable()  argument
661     SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_QMOD);  in qspi_disable()
670 void qspi_write_enable(uint32_t spi_periph)  in qspi_write_enable()  argument
672     SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_QRD);  in qspi_write_enable()
681 void qspi_read_enable(uint32_t spi_periph)  in qspi_read_enable()  argument
683     SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QRD;  in qspi_read_enable()
692 void qspi_io23_output_enable(uint32_t spi_periph)  in qspi_io23_output_enable()  argument
694     SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_IO23_DRV;  in qspi_io23_output_enable()
703 void qspi_io23_output_disable(uint32_t spi_periph)  in qspi_io23_output_disable()  argument
705     SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_IO23_DRV);  in qspi_io23_output_disable()
720 void spi_i2s_interrupt_enable(uint32_t spi_periph, uint8_t spi_i2s_int)  in spi_i2s_interrupt_enable()  argument
725         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE;  in spi_i2s_interrupt_enable()
729         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE;  in spi_i2s_interrupt_enable()
733         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_ERRIE;  in spi_i2s_interrupt_enable()
752 void spi_i2s_interrupt_disable(uint32_t spi_periph, uint8_t spi_i2s_int)  in spi_i2s_interrupt_disable()  argument
757         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE);  in spi_i2s_interrupt_disable()
761         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE);  in spi_i2s_interrupt_disable()
765         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_ERRIE);  in spi_i2s_interrupt_disable()
787 FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t spi_i2s_int)  in spi_i2s_interrupt_flag_get()  argument
789     uint32_t reg1 = SPI_STAT(spi_periph);  in spi_i2s_interrupt_flag_get()
790     uint32_t reg2 = SPI_CTL1(spi_periph);  in spi_i2s_interrupt_flag_get()
861 FlagStatus spi_i2s_flag_get(uint32_t spi_periph, uint32_t spi_i2s_flag)  in spi_i2s_flag_get()  argument
863     if(SPI_STAT(spi_periph) & spi_i2s_flag) {  in spi_i2s_flag_get()
876 void spi_crc_error_clear(uint32_t spi_periph)  in spi_crc_error_clear()  argument
878     SPI_STAT(spi_periph) &= (uint32_t)(~SPI_FLAG_CRCERR);  in spi_crc_error_clear()