Lines Matching refs:CFG1_PREDV

656 #define CFG1_PREDV(regval)         (BITS(0,3) & ((uint32_t)(regval) << 0))  macro
657 #define RCU_PLL_PREDV1              CFG1_PREDV(0)                         /*!< PLL not divided */
658 #define RCU_PLL_PREDV2              CFG1_PREDV(1)                         /*!< PLL divided by 2 */
659 #define RCU_PLL_PREDV3              CFG1_PREDV(2)                         /*!< PLL divided by 3 */
660 #define RCU_PLL_PREDV4              CFG1_PREDV(3)                         /*!< PLL divided by 4 */
661 #define RCU_PLL_PREDV5              CFG1_PREDV(4)                         /*!< PLL divided by 5 */
662 #define RCU_PLL_PREDV6              CFG1_PREDV(5)                         /*!< PLL divided by 6 */
663 #define RCU_PLL_PREDV7              CFG1_PREDV(6)                         /*!< PLL divided by 7 */
664 #define RCU_PLL_PREDV8              CFG1_PREDV(7)                         /*!< PLL divided by 8 */
665 #define RCU_PLL_PREDV9              CFG1_PREDV(8)                         /*!< PLL divided by 9 */
666 #define RCU_PLL_PREDV10             CFG1_PREDV(9)                         /*!< PLL divided by 10 */
667 #define RCU_PLL_PREDV11             CFG1_PREDV(10)                        /*!< PLL divided by 11 */
668 #define RCU_PLL_PREDV12             CFG1_PREDV(11)                        /*!< PLL divided by 12 */
669 #define RCU_PLL_PREDV13             CFG1_PREDV(12)                        /*!< PLL divided by 13 */
670 #define RCU_PLL_PREDV14             CFG1_PREDV(13)                        /*!< PLL divided by 14 */
671 #define RCU_PLL_PREDV15             CFG1_PREDV(14)                        /*!< PLL divided by 15 */
672 #define RCU_PLL_PREDV16             CFG1_PREDV(15)                        /*!< PLL divided by 16 */