59 void spi_i2s_deinit(uint32_t spi_periph)  in spi_i2s_deinit()  argument
61     switch(spi_periph){  in spi_i2s_deinit()
117 void spi_init(uint32_t spi_periph, spi_parameter_struct* spi_struct)  in spi_init()  argument
120     reg = SPI_CTL0(spi_periph);  in spi_init()
139     SPI_CTL0(spi_periph) = (uint32_t)reg;  in spi_init()
141     SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SSEL);  in spi_init()
150 void spi_enable(uint32_t spi_periph)  in spi_enable()  argument
152     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SPIEN;  in spi_enable()
161 void spi_disable(uint32_t spi_periph)  in spi_disable()  argument
163     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SPIEN);  in spi_disable()
189 void i2s_init(uint32_t spi_periph, uint32_t i2s_mode, uint32_t i2s_standard, uint32_t i2s_ckpl)  in i2s_init()  argument
192     reg = SPI_I2SCTL(spi_periph);  in i2s_init()
205     SPI_I2SCTL(spi_periph) = (uint32_t)reg;  in i2s_init()
235 void i2s_psc_config(uint32_t spi_periph, uint32_t i2s_audiosample, uint32_t i2s_frameformat, uint32…  in i2s_psc_config()  argument
246     SPI_I2SPSC(spi_periph) = SPI_I2SPSC_DEFAULT_VALUE;  in i2s_psc_config()
250     if(((uint32_t)spi_periph) == SPI1){  in i2s_psc_config()
323     SPI_I2SPSC(spi_periph) = (uint32_t)(i2sdiv | i2sof | i2s_mckout);  in i2s_psc_config()
326     SPI_I2SCTL(spi_periph) &= (uint32_t)(~(SPI_I2SCTL_DTLEN | SPI_I2SCTL_CHLEN));  in i2s_psc_config()
328     SPI_I2SCTL(spi_periph) |= (uint32_t)i2s_frameformat;  in i2s_psc_config()
337 void i2s_enable(uint32_t spi_periph)  in i2s_enable()  argument
339     SPI_I2SCTL(spi_periph) |= (uint32_t)SPI_I2SCTL_I2SEN;  in i2s_enable()
348 void i2s_disable(uint32_t spi_periph)  in i2s_disable()  argument
350     SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SEN);  in i2s_disable()
359 void spi_nss_output_enable(uint32_t spi_periph)  in spi_nss_output_enable()  argument
361     SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV;  in spi_nss_output_enable()
370 void spi_nss_output_disable(uint32_t spi_periph)  in spi_nss_output_disable()  argument
372     SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV);  in spi_nss_output_disable()
381 void spi_nss_internal_high(uint32_t spi_periph)  in spi_nss_internal_high()  argument
383     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SWNSS;  in spi_nss_internal_high()
392 void spi_nss_internal_low(uint32_t spi_periph)  in spi_nss_internal_low()  argument
394     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SWNSS);  in spi_nss_internal_low()
407 void spi_dma_enable(uint32_t spi_periph, uint8_t dma)  in spi_dma_enable()  argument
410         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMATEN;  in spi_dma_enable()
412         SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMAREN;  in spi_dma_enable()
426 void spi_dma_disable(uint32_t spi_periph, uint8_t dma)  in spi_dma_disable()  argument
429         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMATEN);  in spi_dma_disable()
431         SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMAREN);  in spi_dma_disable()
445 void spi_i2s_data_frame_format_config(uint32_t spi_periph, uint16_t frame_format)  in spi_i2s_data_frame_format_config()  argument
448     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_FF16);  in spi_i2s_data_frame_format_config()
450     SPI_CTL0(spi_periph) |= (uint32_t)frame_format;  in spi_i2s_data_frame_format_config()
460 void spi_i2s_data_transmit(uint32_t spi_periph, uint16_t data)  in spi_i2s_data_transmit()  argument
462     SPI_DATA(spi_periph) = (uint32_t)data;  in spi_i2s_data_transmit()
471 uint16_t spi_i2s_data_receive(uint32_t spi_periph)  in spi_i2s_data_receive()  argument
473     return ((uint16_t)SPI_DATA(spi_periph));  in spi_i2s_data_receive()
485 void spi_bidirectional_transfer_config(uint32_t spi_periph, uint32_t transfer_direction)  in spi_bidirectional_transfer_config()  argument
489         SPI_CTL0(spi_periph) |= (uint32_t)SPI_BIDIRECTIONAL_TRANSMIT;  in spi_bidirectional_transfer_config()
492         SPI_CTL0(spi_periph) &= SPI_BIDIRECTIONAL_RECEIVE;  in spi_bidirectional_transfer_config()
503 void spi_crc_polynomial_set(uint32_t spi_periph,uint16_t crc_poly)  in spi_crc_polynomial_set()  argument
506     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCEN;  in spi_crc_polynomial_set()
509     SPI_CRCPOLY(spi_periph) = (uint32_t)crc_poly;  in spi_crc_polynomial_set()
518 uint16_t spi_crc_polynomial_get(uint32_t spi_periph)  in spi_crc_polynomial_get()  argument
520     return ((uint16_t)SPI_CRCPOLY(spi_periph));  in spi_crc_polynomial_get()
529 void spi_crc_on(uint32_t spi_periph)  in spi_crc_on()  argument
531     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCEN;  in spi_crc_on()
540 void spi_crc_off(uint32_t spi_periph)  in spi_crc_off()  argument
542     SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_CRCEN);  in spi_crc_off()
551 void spi_crc_next(uint32_t spi_periph)  in spi_crc_next()  argument
553     SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCNT;  in spi_crc_next()
566 uint16_t spi_crc_get(uint32_t spi_periph,uint8_t crc)  in spi_crc_get()  argument
569         return ((uint16_t)(SPI_TCRC(spi_periph)));  in spi_crc_get()
571         return ((uint16_t)(SPI_RCRC(spi_periph)));  in spi_crc_get()
581 void spi_ti_mode_enable(uint32_t spi_periph)  in spi_ti_mode_enable()  argument
583     SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TMOD;  in spi_ti_mode_enable()
592 void spi_ti_mode_disable(uint32_t spi_periph)  in spi_ti_mode_disable()  argument
594     SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TMOD);  in spi_ti_mode_disable()
603 void spi_nssp_mode_enable(uint32_t spi_periph)  in spi_nssp_mode_enable()  argument
605     SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSP;  in spi_nssp_mode_enable()
614 void spi_nssp_mode_disable(uint32_t spi_periph)  in spi_nssp_mode_disable()  argument
616     SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSP);  in spi_nssp_mode_disable()
680 void qspi_enable(uint32_t spi_periph)  in qspi_enable()  argument
682     SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QMOD;  in qspi_enable()
691 void qspi_disable(uint32_t spi_periph)  in qspi_disable()  argument
693     SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_QMOD);  in qspi_disable()
702 void qspi_write_enable(uint32_t spi_periph)  in qspi_write_enable()  argument
704     SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_QRD);  in qspi_write_enable()
713 void qspi_read_enable(uint32_t spi_periph)  in qspi_read_enable()  argument
715     SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QRD;  in qspi_read_enable()
724 void qspi_io23_output_enable(uint32_t spi_periph)  in qspi_io23_output_enable()  argument
726     SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_IO23_DRV;  in qspi_io23_output_enable()
735  void qspi_io23_output_disable(uint32_t spi_periph)  in qspi_io23_output_disable()  argument
737     SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_IO23_DRV);  in qspi_io23_output_disable()
752 void spi_i2s_interrupt_enable(uint32_t spi_periph, uint8_t interrupt)  in spi_i2s_interrupt_enable()  argument
754     SPI_CTL1(spi_periph) |= (uint32_t)interrupt;  in spi_i2s_interrupt_enable()
769 void spi_i2s_interrupt_disable(uint32_t spi_periph, uint8_t interrupt)  in spi_i2s_interrupt_disable()  argument
771     SPI_CTL1(spi_periph) &= ~(uint32_t)interrupt;  in spi_i2s_interrupt_disable()
789 FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt)  in spi_i2s_interrupt_flag_get()  argument
791     uint32_t reg1 = SPI_STAT(spi_periph);  in spi_i2s_interrupt_flag_get()
792     uint32_t reg2 = SPI_CTL1(spi_periph);  in spi_i2s_interrupt_flag_get()
863 FlagStatus spi_i2s_flag_get(uint32_t spi_periph, uint32_t flag)  in spi_i2s_flag_get()  argument
865     if(SPI_STAT(spi_periph) & flag){  in spi_i2s_flag_get()
878 void spi_crc_error_clear(uint32_t spi_periph)  in spi_crc_error_clear()  argument
880     SPI_STAT(spi_periph) &= (uint32_t)(~SPI_FLAG_CRCERR);  in spi_crc_error_clear()