Lines Matching full:series
133 \arg RCU_ENET: ENET clock(EPRT and CL series available)
134 \arg RCU_ENETTX: ENETTX clock(EPRT and CL series available)
135 \arg RCU_ENETRX: ENETRX clock(EPRT and CL series available)
136 \arg RCU_USBD: USBD clock(HD,XD and EPRT series available)
137 \arg RCU_USBHS: USBHS clock(CL series available)
141 …IMERx (x=0,1,2,3,4,5,6,7,8,9,10,11,12,13,TIMER8..13 are not available for EPRT series): TIMER clock
147 …\arg RCU_CANx (x=0,1,2,CAN2 is only available for CL series,CANx is not avaliable for GD32E…
151 \arg RCU_ADCx (x=0,1,2,ADC2 is not available for CL series): ADC clock
152 \arg RCU_SDIO: SDIO clock(not available for CL and EPRT series)
155 \arg RCU_SHRTIMER: (not available for EPRT series):SHRTIMER clock
156 \arg RCU_CMP(CMP is only available for CL series):CMP clock
173 \arg RCU_ENET: ENET clock(EPRT and CL series available)
174 \arg RCU_ENETTX: ENETTX clock(EPRT and CL series available)
175 \arg RCU_ENETRX: ENETRX clock(EPRT and CL series available)
176 \arg RCU_USBD: USBD clock(HD,XD and EPRT series available)
177 \arg RCU_USBHS: USBHS clock(CL series available)
181 …IMERx (x=0,1,2,3,4,5,6,7,8,9,10,11,12,13,TIMER8..13 are not available for EPRT series): TIMER clock
187 …\arg RCU_CANx (x=0,1,2,CAN2 is only available for CL series,CANx is not avaliable for GD32E…
191 \arg RCU_ADCx (x=0,1,2,ADC2 is not available for CL series): ADC clock
192 \arg RCU_SDIO: SDIO clock(not available for CL and EPRT series)
195 \arg RCU_SHRTIMER: (not available for EPRT series): SHRTIMER clock
196 \arg RCU_CMP(CMP is only available for CL series):CMP clock
239 \arg RCU_ENETRST: reset ENET(EPRT and CL series available)
240 \arg RCU_USBDRST: reset USBD(HD,XD and EPRT series available)
241 \arg RCU_USBHSRST: reset USBHS(CL series available)
244 …RxRST (x=0,1,2,3,4,5,6,7,8,9,10,11,12,13,TIMER8..13 are not available for EPRT series): reset TIMER
252 \arg RCU_ADCRST (x=0,1,2,ADC2 is not available for CL series): reset ADC
255 \arg RCU_SHRTIMERRST: (not available for EPRT series):reset SHRTIMERRST
256 \arg RCU_CMPRST(CMP is only available for CL series): reset CMP
271 \arg RCU_ENETRST: reset ENET(CL series available)
272 \arg RCU_USBDRST: reset USBD(HD,XD and EPRT series available)
273 \arg RCU_USBHSRST: reset USBHS(CL series available)
276 …RxRST (x=0,1,2,3,4,5,6,7,8,9,10,11,12,13,TIMER8..13 are not available for EPRT series): reset TIMER
284 \arg RCU_ADCRST (x=0,1,2,ADC2 is not available for CL series): reset ADC
287 \arg RCU_SHRTIMERRST: (not available for EPRT series):reset SHRTIMERRST
288 \arg RCU_CMPRST(CMP is only available for CL series): reset CMP
427 \arg RCU_CKOUT0SRC_CKPLL1: CK_PLL1 selected (only available for CL and EPRT series)
428 … \arg RCU_CKOUT0SRC_CKPLL2_DIV2: CK_PLL2/2 selected (only available for CL and EPRT series)
429 \arg RCU_CKOUT0SRC_EXT1: EXT1 selected (only available for CL and EPRT series)
430 … \arg RCU_CKOUT0SRC_CKPLL2: CK_PLL2 clock selected (only available for CL and EPRT series)
431 …arg RCU_CKOUT0SRC_CKIRC48M: CK_IRC48M clock selected (only available for CL and EPRT series)
432 … RCU_CKOUT0SRC_CKIRC48M_DIV8: CK_IRC48M/8 clock selected (only available for CL and EPRT series)
433 …arg RCU_CKOUT0SRC_CKPLLUSB_DIV32: CK_PLLUSB/32 clock selected (only available for CL series)
456 \arg RCU_PLL_MULx (XD series x = 2..63, CL series x = 2..14, 16..64, 6.5)
835 …\arg RCU_CK48MSRC_CKPLLUSB: (not available for EPRT series): CKPLLUSB selected as CK48M sou…
949 \arg RCU_FLAG_PLLUSBSTB: PLLUSB stabilization flag(CL series only)
950 \arg RCU_FLAG_PLL1STB: PLL1 stabilization flag(CL series only)
951 \arg RCU_FLAG_PLL2STB: PLL2 stabilization flag(CL series only)
995 \arg RCU_INT_FLAG_PLL1STB: PLL1 stabilization interrupt flag(CL series only)
996 \arg RCU_INT_FLAG_PLL2STB: PLL2 stabilization interrupt flag(CL series only)
997 \arg RCU_INT_FLAG_PLLUSBSTB: PLLUSB stabilization interrupt flag(CL series only)
1022 \arg RCU_INT_FLAG_PLL1STB_CLR: PLL1 stabilization interrupt flag clear(CL series only)
1023 \arg RCU_INT_FLAG_PLL2STB_CLR: PLL2 stabilization interrupt flag clear(CL series only)
1024 … \arg RCU_INT_FLAG_PLLUSBSTB_CLR: PLLUS stabilization interrupt flag clear(CL series only)
1044 \arg RCU_INT_PLL1STB: PLL1 stabilization interrupt enable(CL series only)
1045 \arg RCU_INT_PLL2STB: PLL2 stabilization interrupt enable(CL series only)
1046 \arg RCU_INT_PLLUSBSTB: PLLUSB stabilization interrupt enable(CL series only)
1065 \arg RCU_INT_PLL1STB: PLL1 stabilization interrupt enable(CL series only)
1066 \arg RCU_INT_PLL2STB: PLL2 stabilization interrupt enable(CL series only)
1067 \arg RCU_INT_PLLUSBSTB: PLLUSB stabilization interrupt enable(CL series only)
1109 \arg RCU_PLL1_CK: phase locked loop 1(CL series only)
1110 \arg RCU_PLL2_CK: phase locked loop 2(CL series only)
1111 \arg RCU_PLLUSB_CK: phase locked loop USB(CL series only)
1258 \arg RCU_PLL1_CK: phase locked loop 1(CL and EPRT series only)
1259 \arg RCU_PLL2_CK: phase locked loop 2(CL and EPRT series only)
1260 \arg RCU_PLLUSB_CK: phase locked loop USB(CL series only)
1279 \arg RCU_PLL1_CK: phase locked loop 1(CL and EPRT series only)
1280 \arg RCU_PLL2_CK: phase locked loop 2(CL and EPRT series only)
1281 \arg RCU_PLLUSB_CK: phase locked loop USB(CL series only)