Lines Matching refs:spi_periph
65 void spi_i2s_deinit(uint32_t spi_periph) in spi_i2s_deinit() argument
67 switch(spi_periph){ in spi_i2s_deinit()
123 void spi_init(uint32_t spi_periph, spi_parameter_struct* spi_struct) in spi_init() argument
126 reg = SPI_CTL0(spi_periph); in spi_init()
145 SPI_CTL0(spi_periph) = (uint32_t)reg; in spi_init()
147 SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SSEL); in spi_init()
156 void spi_enable(uint32_t spi_periph) in spi_enable() argument
158 SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SPIEN; in spi_enable()
167 void spi_disable(uint32_t spi_periph) in spi_disable() argument
169 SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SPIEN); in spi_disable()
195 void i2s_init(uint32_t spi_periph, uint32_t mode, uint32_t standard, uint32_t ckpl) in i2s_init() argument
198 reg = SPI_I2SCTL(spi_periph); in i2s_init()
211 SPI_I2SCTL(spi_periph) = (uint32_t)reg; in i2s_init()
241 void i2s_psc_config(uint32_t spi_periph, uint32_t audiosample, uint32_t frameformat, uint32_t mckou… in i2s_psc_config() argument
253 SPI_I2SPSC(spi_periph) = SPI_I2SPSC_DEFAULT_VALUE; in i2s_psc_config()
256 if(SPI1 == ((uint32_t)spi_periph)){ in i2s_psc_config()
315 SPI_I2SPSC(spi_periph) = (uint32_t)(i2sdiv | i2sof | mckout); in i2s_psc_config()
318 SPI_I2SCTL(spi_periph) &= (uint32_t)(~(SPI_I2SCTL_DTLEN | SPI_I2SCTL_CHLEN)); in i2s_psc_config()
320 SPI_I2SCTL(spi_periph) |= (uint32_t)frameformat; in i2s_psc_config()
329 void i2s_enable(uint32_t spi_periph) in i2s_enable() argument
331 SPI_I2SCTL(spi_periph) |= (uint32_t)SPI_I2SCTL_I2SEN; in i2s_enable()
340 void i2s_disable(uint32_t spi_periph) in i2s_disable() argument
342 SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SEN); in i2s_disable()
351 void spi_nss_output_enable(uint32_t spi_periph) in spi_nss_output_enable() argument
353 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
362 void spi_nss_output_disable(uint32_t spi_periph) in spi_nss_output_disable() argument
364 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
373 void spi_nss_internal_high(uint32_t spi_periph) in spi_nss_internal_high() argument
375 SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SWNSS; in spi_nss_internal_high()
384 void spi_nss_internal_low(uint32_t spi_periph) in spi_nss_internal_low() argument
386 SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SWNSS); in spi_nss_internal_low()
399 void spi_dma_enable(uint32_t spi_periph, uint8_t dma) in spi_dma_enable() argument
402 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMATEN; in spi_dma_enable()
404 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMAREN; in spi_dma_enable()
418 void spi_dma_disable(uint32_t spi_periph, uint8_t dma) in spi_dma_disable() argument
421 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMATEN); in spi_dma_disable()
423 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMAREN); in spi_dma_disable()
437 void spi_i2s_data_frame_format_config(uint32_t spi_periph, uint16_t frame_format) in spi_i2s_data_frame_format_config() argument
440 SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_FF16); in spi_i2s_data_frame_format_config()
442 SPI_CTL0(spi_periph) |= (uint32_t)frame_format; in spi_i2s_data_frame_format_config()
452 void spi_i2s_data_transmit(uint32_t spi_periph, uint16_t data) in spi_i2s_data_transmit() argument
454 SPI_DATA(spi_periph) = (uint32_t)data; in spi_i2s_data_transmit()
463 uint16_t spi_i2s_data_receive(uint32_t spi_periph) in spi_i2s_data_receive() argument
465 return ((uint16_t)SPI_DATA(spi_periph)); in spi_i2s_data_receive()
478 void spi_bidirectional_transfer_config(uint32_t spi_periph, uint32_t transfer_direction) in spi_bidirectional_transfer_config() argument
482 SPI_CTL0(spi_periph) |= (uint32_t)SPI_BIDIRECTIONAL_TRANSMIT; in spi_bidirectional_transfer_config()
485 SPI_CTL0(spi_periph) &= SPI_BIDIRECTIONAL_RECEIVE; in spi_bidirectional_transfer_config()
496 void spi_crc_polynomial_set(uint32_t spi_periph,uint16_t crc_poly) in spi_crc_polynomial_set() argument
499 SPI_CRCPOLY(spi_periph) = (uint32_t)crc_poly; in spi_crc_polynomial_set()
508 uint16_t spi_crc_polynomial_get(uint32_t spi_periph) in spi_crc_polynomial_get() argument
510 return ((uint16_t)SPI_CRCPOLY(spi_periph)); in spi_crc_polynomial_get()
519 void spi_crc_on(uint32_t spi_periph) in spi_crc_on() argument
521 SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCEN; in spi_crc_on()
530 void spi_crc_off(uint32_t spi_periph) in spi_crc_off() argument
532 SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_CRCEN); in spi_crc_off()
541 void spi_crc_next(uint32_t spi_periph) in spi_crc_next() argument
543 SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCNT; in spi_crc_next()
556 uint16_t spi_crc_get(uint32_t spi_periph,uint8_t crc) in spi_crc_get() argument
559 return ((uint16_t)(SPI_TCRC(spi_periph))); in spi_crc_get()
561 return ((uint16_t)(SPI_RCRC(spi_periph))); in spi_crc_get()
571 void spi_ti_mode_enable(uint32_t spi_periph) in spi_ti_mode_enable() argument
573 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TMOD; in spi_ti_mode_enable()
582 void spi_ti_mode_disable(uint32_t spi_periph) in spi_ti_mode_disable() argument
584 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TMOD); in spi_ti_mode_disable()
593 void spi_nssp_mode_enable(uint32_t spi_periph) in spi_nssp_mode_enable() argument
595 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSP; in spi_nssp_mode_enable()
604 void spi_nssp_mode_disable(uint32_t spi_periph) in spi_nssp_mode_disable() argument
606 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSP); in spi_nssp_mode_disable()
615 void spi_quad_enable(uint32_t spi_periph) in spi_quad_enable() argument
617 SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QMOD; in spi_quad_enable()
626 void spi_quad_disable(uint32_t spi_periph) in spi_quad_disable() argument
628 SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_QMOD); in spi_quad_disable()
637 void spi_quad_write_enable(uint32_t spi_periph) in spi_quad_write_enable() argument
639 SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_QRD); in spi_quad_write_enable()
648 void spi_quad_read_enable(uint32_t spi_periph) in spi_quad_read_enable() argument
650 SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QRD; in spi_quad_read_enable()
659 void spi_quad_io23_output_enable(uint32_t spi_periph) in spi_quad_io23_output_enable() argument
661 SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_IO23_DRV; in spi_quad_io23_output_enable()
670 void spi_quad_io23_output_disable(uint32_t spi_periph) in spi_quad_io23_output_disable() argument
672 SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_IO23_DRV); in spi_quad_io23_output_disable()
687 void spi_i2s_interrupt_enable(uint32_t spi_periph, uint8_t interrupt) in spi_i2s_interrupt_enable() argument
692 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE; in spi_i2s_interrupt_enable()
696 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE; in spi_i2s_interrupt_enable()
700 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_ERRIE; in spi_i2s_interrupt_enable()
719 void spi_i2s_interrupt_disable(uint32_t spi_periph, uint8_t interrupt) in spi_i2s_interrupt_disable() argument
724 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE); in spi_i2s_interrupt_disable()
728 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE); in spi_i2s_interrupt_disable()
732 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_ERRIE); in spi_i2s_interrupt_disable()
754 FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt) in spi_i2s_interrupt_flag_get() argument
756 uint32_t reg1 = SPI_STAT(spi_periph); in spi_i2s_interrupt_flag_get()
757 uint32_t reg2 = SPI_CTL1(spi_periph); in spi_i2s_interrupt_flag_get()
828 FlagStatus spi_i2s_flag_get(uint32_t spi_periph, uint32_t flag) in spi_i2s_flag_get() argument
830 if(RESET != (SPI_STAT(spi_periph) & flag)){ in spi_i2s_flag_get()
843 void spi_crc_error_clear(uint32_t spi_periph) in spi_crc_error_clear() argument
845 SPI_STAT(spi_periph) &= (uint32_t)(~SPI_FLAG_CRCERR); in spi_crc_error_clear()