305     USART_CTL2(usart_periph) &= ~(USART_CTL2_OVRD);  in usart_overrun_enable()
318     USART_CTL2(usart_periph) |= USART_CTL2_OVRD;  in usart_overrun_disable()
355     USART_CTL2(usart_periph) &= ~(USART_CTL2_OSB);  in usart_sample_bit_config()
356     USART_CTL2(usart_periph) |= osb;  in usart_sample_bit_config()
568     USART_CTL2(usart_periph) |= USART_CTL2_HDEN;  in usart_halfduplex_enable()
582     USART_CTL2(usart_periph) &= ~(USART_CTL2_HDEN);  in usart_halfduplex_disable()
670     USART_CTL2(usart_periph) |= USART_CTL2_SCEN;  in usart_smartcard_mode_enable()
684     USART_CTL2(usart_periph) &= ~(USART_CTL2_SCEN);  in usart_smartcard_mode_disable()
698     USART_CTL2(usart_periph) |= USART_CTL2_NKEN;  in usart_smartcard_mode_nack_enable()
712     USART_CTL2(usart_periph) &= ~(USART_CTL2_NKEN);  in usart_smartcard_mode_nack_disable()
748     USART_CTL2(usart_periph) &= ~(USART_CTL2_SCRTNUM);  in usart_smartcard_autoretry_config()
749     USART_CTL2(usart_periph) |= (USART_CTL2_SCRTNUM & (scrtnum << 17));  in usart_smartcard_autoretry_config()
776     USART_CTL2(usart_periph) |= USART_CTL2_IREN;  in usart_irda_mode_enable()
790     USART_CTL2(usart_periph) &= ~(USART_CTL2_IREN);  in usart_irda_mode_disable()
822     USART_CTL2(usart_periph) &= ~(USART_CTL2_IRLP);  in usart_irda_lowpower_config()
823     USART_CTL2(usart_periph) |= (USART_CTL2_IRLP & irlp);  in usart_irda_lowpower_config()
841     USART_CTL2(usart_periph) &= ~(USART_CTL2_RTSEN);  in usart_hardware_flow_rts_config()
842     USART_CTL2(usart_periph) |= rtsconfig;  in usart_hardware_flow_rts_config()
860     USART_CTL2(usart_periph) &= ~(USART_CTL2_CTSEN);  in usart_hardware_flow_cts_config()
861     USART_CTL2(usart_periph) |= ctsconfig;  in usart_hardware_flow_cts_config()
891     USART_CTL2(usart_periph) |= USART_CTL2_DEM;  in usart_rs485_driver_enable()
905     USART_CTL2(usart_periph) &= ~(USART_CTL2_DEM);  in usart_rs485_driver_disable()
955     USART_CTL2(usart_periph) &= ~(USART_CTL2_DEP);  in usart_depolarity_config()
956     USART_CTL2(usart_periph) |= (USART_CTL2_DEP & dep);  in usart_depolarity_config()
971     USART_CTL2(usart_periph) &= ~(USART_CTL2_DENR);  in usart_dma_receive_config()
972     USART_CTL2(usart_periph) |= (USART_CTL2_DENR & dmaconfig);  in usart_dma_receive_config()
987     USART_CTL2(usart_periph) &= ~(USART_CTL2_DENT);  in usart_dma_transmit_config()
988     USART_CTL2(usart_periph) |= (USART_CTL2_DENT & dmaconfig);  in usart_dma_transmit_config()
1002     USART_CTL2(usart_periph) |= USART_CTL2_DDRE;  in usart_reception_error_dma_disable()
1016     USART_CTL2(usart_periph) &= ~(USART_CTL2_DDRE);  in usart_reception_error_dma_enable()
1057     USART_CTL2(usart_periph) &= ~(USART_CTL2_WUM);  in usart_wakeup_mode_config()
1058     USART_CTL2(usart_periph) |= USART_CTL2_WUM & (wum);  in usart_wakeup_mode_config()