Lines Matching refs:spi_periph
59 void spi_i2s_deinit(uint32_t spi_periph) in spi_i2s_deinit() argument
61 switch(spi_periph){ in spi_i2s_deinit()
112 void spi_init(uint32_t spi_periph, spi_parameter_struct* spi_struct) in spi_init() argument
115 reg = SPI_CTL0(spi_periph); in spi_init()
134 SPI_CTL0(spi_periph) = (uint32_t)reg; in spi_init()
136 SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SSEL); in spi_init()
145 void spi_enable(uint32_t spi_periph) in spi_enable() argument
147 SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SPIEN; in spi_enable()
156 void spi_disable(uint32_t spi_periph) in spi_disable() argument
158 SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SPIEN); in spi_disable()
184 void i2s_init(uint32_t spi_periph, uint32_t i2s_mode, uint32_t i2s_standard, uint32_t i2s_ckpl) in i2s_init() argument
187 reg = SPI_I2SCTL(spi_periph); in i2s_init()
200 SPI_I2SCTL(spi_periph) = (uint32_t)reg; in i2s_init()
230 void i2s_psc_config(uint32_t spi_periph, uint32_t i2s_audiosample, uint32_t i2s_frameformat, uint32… in i2s_psc_config() argument
242 SPI_I2SPSC(spi_periph) = SPI_I2SPSC_RESET; in i2s_psc_config()
245 if(SPI1 == ((uint32_t)spi_periph)) { in i2s_psc_config()
300 SPI_I2SPSC(spi_periph) = (uint32_t)(i2sdiv | i2sof | i2s_mckout); in i2s_psc_config()
303 SPI_I2SCTL(spi_periph) &= (uint32_t)(~(SPI_I2SCTL_DTLEN | SPI_I2SCTL_CHLEN)); in i2s_psc_config()
306 SPI_I2SCTL(spi_periph) |= (uint32_t)i2s_frameformat; in i2s_psc_config()
315 void i2s_enable(uint32_t spi_periph) in i2s_enable() argument
317 SPI_I2SCTL(spi_periph) |= (uint32_t)SPI_I2SCTL_I2SEN; in i2s_enable()
326 void i2s_disable(uint32_t spi_periph) in i2s_disable() argument
328 SPI_I2SCTL(spi_periph) &= (uint32_t)(~SPI_I2SCTL_I2SEN); in i2s_disable()
337 void spi_nss_output_enable(uint32_t spi_periph) in spi_nss_output_enable() argument
339 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
348 void spi_nss_output_disable(uint32_t spi_periph) in spi_nss_output_disable() argument
350 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
359 void spi_nss_internal_high(uint32_t spi_periph) in spi_nss_internal_high() argument
361 SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_SWNSS; in spi_nss_internal_high()
370 void spi_nss_internal_low(uint32_t spi_periph) in spi_nss_internal_low() argument
372 SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_SWNSS); in spi_nss_internal_low()
385 void spi_dma_enable(uint32_t spi_periph, uint8_t spi_dma) in spi_dma_enable() argument
388 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMATEN; in spi_dma_enable()
390 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_DMAREN; in spi_dma_enable()
404 void spi_dma_disable(uint32_t spi_periph, uint8_t spi_dma) in spi_dma_disable() argument
407 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMATEN); in spi_dma_disable()
409 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_DMAREN); in spi_dma_disable()
423 void spi_i2s_data_frame_format_config(uint32_t spi_periph, uint16_t frame_format) in spi_i2s_data_frame_format_config() argument
426 SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_FF16); in spi_i2s_data_frame_format_config()
428 SPI_CTL0(spi_periph) |= (uint32_t)frame_format; in spi_i2s_data_frame_format_config()
441 void spi_bidirectional_transfer_config(uint32_t spi_periph, uint32_t transfer_direction) in spi_bidirectional_transfer_config() argument
445 SPI_CTL0(spi_periph) |= (uint32_t)SPI_BIDIRECTIONAL_TRANSMIT; in spi_bidirectional_transfer_config()
448 SPI_CTL0(spi_periph) &= SPI_BIDIRECTIONAL_RECEIVE; in spi_bidirectional_transfer_config()
459 void spi_i2s_data_transmit(uint32_t spi_periph, uint16_t data) in spi_i2s_data_transmit() argument
461 SPI_DATA(spi_periph) = (uint32_t)data; in spi_i2s_data_transmit()
470 uint16_t spi_i2s_data_receive(uint32_t spi_periph) in spi_i2s_data_receive() argument
472 return ((uint16_t)SPI_DATA(spi_periph)); in spi_i2s_data_receive()
481 void spi_crc_polynomial_set(uint32_t spi_periph,uint16_t crc_poly) in spi_crc_polynomial_set() argument
484 SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCEN; in spi_crc_polynomial_set()
487 SPI_CRCPOLY(spi_periph) = (uint32_t)crc_poly; in spi_crc_polynomial_set()
496 uint16_t spi_crc_polynomial_get(uint32_t spi_periph) in spi_crc_polynomial_get() argument
498 return ((uint16_t)SPI_CRCPOLY(spi_periph)); in spi_crc_polynomial_get()
507 void spi_crc_on(uint32_t spi_periph) in spi_crc_on() argument
509 SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCEN; in spi_crc_on()
518 void spi_crc_off(uint32_t spi_periph) in spi_crc_off() argument
520 SPI_CTL0(spi_periph) &= (uint32_t)(~SPI_CTL0_CRCEN); in spi_crc_off()
529 void spi_crc_next(uint32_t spi_periph) in spi_crc_next() argument
531 SPI_CTL0(spi_periph) |= (uint32_t)SPI_CTL0_CRCNT; in spi_crc_next()
544 uint16_t spi_crc_get(uint32_t spi_periph,uint8_t crc) in spi_crc_get() argument
547 return ((uint16_t)(SPI_TCRC(spi_periph))); in spi_crc_get()
549 return ((uint16_t)(SPI_RCRC(spi_periph))); in spi_crc_get()
559 void spi_ti_mode_enable(uint32_t spi_periph) in spi_ti_mode_enable() argument
561 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TMOD; in spi_ti_mode_enable()
570 void spi_ti_mode_disable(uint32_t spi_periph) in spi_ti_mode_disable() argument
572 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TMOD); in spi_ti_mode_disable()
581 void spi_nssp_mode_enable(uint32_t spi_periph) in spi_nssp_mode_enable() argument
583 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSP; in spi_nssp_mode_enable()
592 void spi_nssp_mode_disable(uint32_t spi_periph) in spi_nssp_mode_disable() argument
594 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSP); in spi_nssp_mode_disable()
603 void spi_quad_enable(uint32_t spi_periph) in spi_quad_enable() argument
605 SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QMOD; in spi_quad_enable()
614 void spi_quad_disable(uint32_t spi_periph) in spi_quad_disable() argument
616 SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_QMOD); in spi_quad_disable()
625 void spi_quad_write_enable(uint32_t spi_periph) in spi_quad_write_enable() argument
627 SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_QRD); in spi_quad_write_enable()
636 void spi_quad_read_enable(uint32_t spi_periph) in spi_quad_read_enable() argument
638 SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QRD; in spi_quad_read_enable()
647 void spi_quad_io23_output_enable(uint32_t spi_periph) in spi_quad_io23_output_enable() argument
649 SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_IO23_DRV; in spi_quad_io23_output_enable()
658 void spi_quad_io23_output_disable(uint32_t spi_periph) in spi_quad_io23_output_disable() argument
660 SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_IO23_DRV); in spi_quad_io23_output_disable()
685 FlagStatus spi_i2s_flag_get(uint32_t spi_periph, uint32_t flag) in spi_i2s_flag_get() argument
687 if(RESET != (SPI_STAT(spi_periph) & flag)) { in spi_i2s_flag_get()
705 void spi_i2s_interrupt_enable(uint32_t spi_periph, uint8_t interrupt) in spi_i2s_interrupt_enable() argument
707 SPI_CTL1(spi_periph) |= (uint32_t)interrupt; in spi_i2s_interrupt_enable()
722 void spi_i2s_interrupt_disable(uint32_t spi_periph, uint8_t interrupt) in spi_i2s_interrupt_disable() argument
724 SPI_CTL1(spi_periph) &= ~(uint32_t)interrupt; in spi_i2s_interrupt_disable()
742 FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt) in spi_i2s_interrupt_flag_get() argument
744 uint32_t reg1 = SPI_STAT(spi_periph); in spi_i2s_interrupt_flag_get()
745 uint32_t reg2 = SPI_CTL1(spi_periph); in spi_i2s_interrupt_flag_get()
800 void spi_crc_error_clear(uint32_t spi_periph) in spi_crc_error_clear() argument
802 SPI_STAT(spi_periph) &= (uint32_t)(~SPI_FLAG_CRCERR); in spi_crc_error_clear()