132     def is_flash_encryption_key_valid(self):  argument
135         word0 = self.read_efuse(0)
149                 key_word[i] = self.read_efuse(14 + i)
155     def get_flash_crypt_config(self):  argument
164         word0 = self.read_efuse(0)
170             word5 = self.read_efuse(5)
177     def get_encrypted_download_disabled(self):  argument
179             self.read_reg(self.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG)
180             & self.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT
183     def get_flash_encryption_enabled(self):  argument
185             self.read_reg(self.EFUSE_SPI_BOOT_CRYPT_CNT_REG)
186             & self.EFUSE_SPI_BOOT_CRYPT_CNT_MASK
191     def get_secure_boot_enabled(self):  argument
192         efuses = self.read_reg(self.EFUSE_RD_ABS_DONE_REG)
193         rev = self.get_chip_revision()
194         return efuses & self.EFUSE_RD_ABS_DONE_0_MASK or (
195             rev >= 300 and efuses & self.EFUSE_RD_ABS_DONE_1_MASK
198     def get_pkg_version(self):  argument
199         word3 = self.read_efuse(3)
204     def get_chip_revision(self):  argument
205         return self.get_major_chip_version() * 100 + self.get_minor_chip_version()
207     def get_minor_chip_version(self):  argument
208         return (self.read_efuse(5) >> 24) & 0x3
210     def get_major_chip_version(self):  argument
211         rev_bit0 = (self.read_efuse(3) >> 15) & 0x1
212         rev_bit1 = (self.read_efuse(5) >> 20) & 0x1
213         apb_ctl_date = self.read_reg(self.APB_CTL_DATE_ADDR)
214         rev_bit2 = (apb_ctl_date >> self.APB_CTL_DATE_S) & self.APB_CTL_DATE_V
225     def get_chip_description(self):  argument
226         pkg_version = self.get_pkg_version()
227         major_rev = self.get_major_chip_version()
228         minor_rev = self.get_minor_chip_version()
230         sc = self.read_efuse(3) & (1 << 0)  # single core, CHIP_VER DIS_APP_CPU
244     def get_chip_features(self):  argument
246         word3 = self.read_efuse(3)
270         pkg_version = self.get_pkg_version()
277         word4 = self.read_efuse(4)
286         word6 = self.read_efuse(6)
300     def get_chip_spi_pads(self):  argument
304         efuse_blk0_rdata5 = self.read_reg(self.EFUSE_BLK0_RDATA5_REG_OFFS)
310         efuse_blk0_rdata3_reg = self.read_reg(self.EFUSE_BLK0_RDATA3_REG_OFFS)
314     def read_efuse(self, n):  argument
316         return self.read_reg(self.EFUSE_RD_REG_BASE + (4 * n))
318     def chip_id(self):  argument
319         raise NotSupportedError(self, "Function chip_id")
321     def read_mac(self, mac_type="BASE_MAC"):  argument
325         words = [self.read_efuse(2), self.read_efuse(1)]
330     def get_erase_size(self, offset, size):  argument
333     def _get_efuse_flash_voltage(self) -> Optional[str]:  argument
334         efuse = self.read_reg(self.EFUSE_VDD_SPI_REG)
336         if efuse & (self.VDD_SPI_FORCE | self.VDD_SPI_XPD | self.VDD_SPI_TIEH):
338         elif efuse & (self.VDD_SPI_FORCE | self.VDD_SPI_XPD):
340         elif efuse & self.VDD_SPI_FORCE:
344     def _get_rtc_cntl_flash_voltage(self) -> Optional[str]:  argument
345         reg = self.read_reg(self.RTC_CNTL_SDIO_CONF_REG)
347         if reg & self.RTC_CNTL_SDIO_FORCE:
348             if reg & self.RTC_CNTL_DREFH_SDIO_M:
350             elif reg & self.RTC_CNTL_XPD_SDIO_REG:
356     def get_flash_voltage(self):  argument
358         voltage = self._get_rtc_cntl_flash_voltage()
361             voltage = self._get_efuse_flash_voltage()
364             strap_reg = self.read_reg(self.GPIO_STRAP_REG)
365             strap_reg &= self.GPIO_STRAP_VDDSPI_MASK
370     def override_vddsdio(self, new_voltage):  argument
372         if new_voltage not in self.OVERRIDE_VDDSDIO_CHOICES:
379         reg_val = self.RTC_CNTL_SDIO_FORCE  # override efuse setting
380         reg_val |= self.RTC_CNTL_SDIO_PD_EN
382             reg_val |= self.RTC_CNTL_XPD_SDIO_REG  # enable internal LDO
385                 self.RTC_CNTL_DREFH_SDIO_M
386                 | self.RTC_CNTL_DREFM_SDIO_M
387                 | self.RTC_CNTL_DREFL_SDIO_M
389         self.write_reg(self.RTC_CNTL_SDIO_CONF_REG, reg_val)
392     def read_flash_slow(self, offset, length, progress_fn):  argument
399                 r = self.check_command(
401                     self.ESP_READ_FLASH_SLOW,
421     def get_rom_cal_crystal_freq(self):  argument
429             self.read_reg(self.RTCCALICFG1) >> self.TIMERS_RTC_CALI_VALUE_S
430         ) & self.TIMERS_RTC_CALI_VALUE
431         clk_8M_freq = self.read_efuse(4) & (0xFF)  # EFUSE_RD_CK8M_FREQ
435     def change_baud(self, baud):  argument
436         assert self.CHIP_NAME == "ESP32", "This workaround should only apply to ESP32"
438         rom_calculated_freq = self.get_rom_cal_crystal_freq()
443         self.command(self.ESP_CHANGE_BAUDRATE, struct.pack("<II", false_rom_baud, 0))
445         self._set_port_baudrate(baud)
447         self.flush_input()
449     def check_spi_connection(self, spi_connection):  argument
462     def __init__(self, rom_loader):  argument
463         self.secure_download_mode = rom_loader.secure_download_mode
464         self._port = rom_loader._port
465         self._trace_enabled = rom_loader._trace_enabled
466         self.cache = rom_loader.cache
467         self.flush_input()  # resets _slip_reader
469     def change_baud(self, baud):  argument
470         ESPLoader.change_baud(self, baud)