Lines Matching refs:pins
8 These options control how many I/O pins are used for communication with the attached SPI flash chip…
20 | ``qio`` | Quad I/O | 4 pins used for address & data | Fastest. …
22 | ``qout`` | Quad Output | 4 pins used for data. | Approx 15% slower than ``qio``. …
24 | ``dio`` | Dual I/O | 2 pins used for address & data | Approx 45% slower than ``qio``. …
26 | ``dout`` | Dual Output | 2 pins used for data. | Approx 50% slower than ``qio``. …
37 A traditional "single" SPI (Serial Peripheral Interface) bus uses 4 pins for communication:
53 …h manufacturers introduced "Dual SPI". In Dual SPI modes, the MOSI & MISO pins are both used to re…
55 …via normal SPI, but then the host reads the data via both the MOSI & MISO pins simultaneously with…
58 …, but then the address is sent to the flash chip via both the MOSI & MISO pins with two bits per c…
68 … manufacturers introduced "Quad SPI" mode. This mode added two additional pins (otherwise used for…
70 Not all flash chips support Quad SPI modes, and not all ESP chips have these pins wired up to the S…
72 …is command is the same as "Dual Output Fast Read", only data is read on 4 pins instead of 2 with 4…
74 …me as "Dual I/O Fast Read", only both address & data are transferred on 4 pins instead of 2 with 4…
85 * The WP and HOLD pins of the SPI flash chip are not wired to the correct GPIOs of the Espressif ch…