Lines Matching refs:t0
27 sw t0, RV_STK_T0(sp)
57 csrr t0, mepc
58 sw t0, RV_STK_MEPC(sp)
67 lw t0, RV_STK_T0(sp)
98 lw t0, RV_STK_MEPC(sp)
99 csrw mepc, t0
151 addi t0, sp, RV_STK_FRMSZ /* restore sp with the value when trap happened */
154 sw t0, RV_STK_SP(sp)
155 csrr t0, mepc
156 sw t0, RV_STK_MEPC(sp)
157 csrr t0, mstatus
158 sw t0, RV_STK_MSTATUS(sp)
159 csrr t0, mtvec
160 sw t0, RV_STK_MTVEC(sp)
161 csrr t0, mtval
162 sw t0, RV_STK_MTVAL(sp)
163 csrr t0, mhartid
164 sw t0, RV_STK_MHARTID(sp)
175 li t0, 0x80000000
176 bgeu a1, t0, _call_panic_handler
186 not t0, t0
187 and a1, a1, t0
226 addi t0, sp, CONTEXT_SIZE /* restore sp with the value when interrupt happened */
228 sw t0, RV_STK_SP(sp)
241 li t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
242 lw s3, 0(t0)
252 sw t2, 0(t0) /* INTERRUPT_CORE0_CPU_INT_THRESH_REG = t2 */
255 li t0, 0x8
256 csrrs t0, mstatus, t0
266 la t0, esp_pm_trace_exit
267 jalr t0 /* absolute jump, avoid the 1 MiB range constraint */
271 la t0, esp_pm_impl_isr_hook
272 jalr t0 /* absolute jump, avoid the 1 MiB range constraint */
279 li t0, 0x7fffffff
280 and a1, a1, t0
285 li t0, 0x8
286 csrrc t0, mstatus, t0
290 li t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
291 sw s3, 0(t0)