385     hw->power.hp_pd[domain].force_reset = rst;  in pmu_ll_hp_set_power_force_reset()
390     hw->power.hp_pd[domain].force_iso = iso;  in pmu_ll_hp_set_power_force_isolate()
395     hw->power.hp_pd[domain].force_pu = fpu;  in pmu_ll_hp_set_power_force_power_up()
400     hw->power.hp_pd[domain].force_no_reset = no_rst;  in pmu_ll_hp_set_power_force_no_reset()
405     hw->power.hp_pd[domain].force_no_iso = no_iso;  in pmu_ll_hp_set_power_force_no_isolate()
410     hw->power.hp_pd[domain].force_pd = fpd;  in pmu_ll_hp_set_power_force_power_down()
415     hw->power.lp_peri.force_reset = rst;  in pmu_ll_lp_set_power_force_reset()
420     hw->power.lp_peri.force_iso = iso;  in pmu_ll_lp_set_power_force_isolate()
425     hw->power.lp_peri.force_pu = fpu;  in pmu_ll_lp_set_power_force_power_up()
430     hw->power.lp_peri.force_no_reset = no_rst;  in pmu_ll_lp_set_power_force_no_reset()
435     hw->power.lp_peri.force_no_iso = no_iso;  in pmu_ll_lp_set_power_force_no_isolate()
440     hw->power.lp_peri.force_pd = fpd;  in pmu_ll_lp_set_power_force_power_down()
445     hw->power.mem_cntl.force_hp_mem_iso = iso;  in pmu_ll_hp_set_memory_isolate()
450     hw->power.mem_cntl.force_hp_mem_pd = fpd;  in pmu_ll_hp_set_memory_power_down()
455     hw->power.mem_cntl.force_hp_mem_no_iso = no_iso;  in pmu_ll_hp_set_memory_no_isolate()
460     hw->power.mem_cntl.force_hp_mem_pu = fpu;  in pmu_ll_hp_set_memory_power_up()
572     hw->power.wait_timer0.powerdown_timer = cycle;  in pmu_ll_hp_set_digital_power_down_wait_cycle()
577     return hw->power.wait_timer0.powerdown_timer;  in pmu_ll_hp_get_digital_power_down_wait_cycle()
582     hw->power.wait_timer1.powerdown_timer = cycle;  in pmu_ll_lp_set_digital_power_down_wait_cycle()
587     return hw->power.wait_timer1.powerdown_timer;  in pmu_ll_lp_get_digital_power_down_wait_cycle()
612     HAL_FORCE_MODIFY_U32_REG_FIELD(hw->power.clk_wait, wait_xtal_stable, cycle);  in pmu_ll_set_xtal_stable_wait_cycle()
617     return HAL_FORCE_READ_U32_REG_FIELD(hw->power.clk_wait, wait_xtal_stable);  in pmu_ll_get_xtal_stable_wait_cycle()
622     HAL_FORCE_MODIFY_U32_REG_FIELD(hw->power.clk_wait, wait_pll_stable, cycle);  in pmu_ll_set_pll_stable_wait_cycle()
627     return HAL_FORCE_READ_U32_REG_FIELD(hw->power.clk_wait, wait_pll_stable);  in pmu_ll_get_pll_stable_wait_cycle()
632     hw->power.wait_timer1.wait_timer = cycle;  in pmu_ll_lp_set_digital_power_supply_wait_cycle()
637     return hw->power.wait_timer1.wait_timer;  in pmu_ll_lp_get_digital_power_supply_wait_cycle()
642     hw->power.wait_timer1.powerup_timer = cycle;  in pmu_ll_lp_set_digital_power_up_wait_cycle()
647     return hw->power.wait_timer1.powerup_timer;  in pmu_ll_lp_get_digital_power_up_wait_cycle()
662     hw->power.wait_timer0.wait_timer = cycle;  in pmu_ll_hp_set_digital_power_supply_wait_cycle()
667     return hw->power.wait_timer0.wait_timer;  in pmu_ll_hp_get_digital_power_supply_wait_cycle()
672     hw->power.wait_timer0.powerup_timer = cycle;  in pmu_ll_hp_set_digital_power_up_wait_cycle()
677     return hw->power.wait_timer0.powerup_timer;  in pmu_ll_hp_get_digital_power_up_wait_cycle()