Lines Matching refs:EFUSE_BLK0
19 {EFUSE_BLK0, 0, 32}, // [] Disable programming of individual eFuses,
23 {EFUSE_BLK0, 0, 1}, // [] wr_dis of RD_DIS,
27 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_ICACHE,
31 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_USB_JTAG,
35 {EFUSE_BLK0, 2, 1}, // [] wr_dis of POWERGLITCH_EN,
39 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_FORCE_DOWNLOAD,
43 {EFUSE_BLK0, 2, 1}, // [] wr_dis of SPI_DOWNLOAD_MSPI_DIS,
47 {EFUSE_BLK0, 2, 1}, // [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI,
51 {EFUSE_BLK0, 2, 1}, // [] wr_dis of JTAG_SEL_ENABLE,
55 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_PAD_JTAG,
59 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT,
63 {EFUSE_BLK0, 2, 1}, // [] wr_dis of POWERGLITCH_EN1,
67 {EFUSE_BLK0, 3, 1}, // [] wr_dis of WDT_DELAY_SEL,
71 {EFUSE_BLK0, 4, 1}, // [] wr_dis of SPI_BOOT_CRYPT_CNT,
75 {EFUSE_BLK0, 5, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE0,
79 {EFUSE_BLK0, 6, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE1,
83 {EFUSE_BLK0, 7, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE2,
87 {EFUSE_BLK0, 8, 1}, // [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0,
91 {EFUSE_BLK0, 9, 1}, // [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1,
95 {EFUSE_BLK0, 10, 1}, // [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2,
99 {EFUSE_BLK0, 11, 1}, // [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3,
103 {EFUSE_BLK0, 12, 1}, // [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4,
107 {EFUSE_BLK0, 13, 1}, // [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5,
111 {EFUSE_BLK0, 14, 1}, // [] wr_dis of XTS_DPA_PSEUDO_LEVEL,
115 {EFUSE_BLK0, 14, 1}, // [] wr_dis of SEC_DPA_LEVEL,
119 {EFUSE_BLK0, 14, 1}, // [] wr_dis of CRYPT_DPA_ENABLE,
123 {EFUSE_BLK0, 15, 1}, // [] wr_dis of SECURE_BOOT_EN,
127 {EFUSE_BLK0, 16, 1}, // [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE,
131 {EFUSE_BLK0, 17, 1}, // [] wr_dis of ECDSA_CURVE_MODE,
135 {EFUSE_BLK0, 17, 1}, // [] wr_dis of ECC_FORCE_CONST_TIME,
139 {EFUSE_BLK0, 18, 1}, // [] wr_dis of FLASH_TPUW,
143 {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_DOWNLOAD_MODE,
147 {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_DIRECT_BOOT,
151 {EFUSE_BLK0, 18, 1}, // [WR_DIS.DIS_USB_PRINT] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT,
155 {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,
159 {EFUSE_BLK0, 18, 1}, // [] wr_dis of ENABLE_SECURITY_DOWNLOAD,
163 {EFUSE_BLK0, 18, 1}, // [] wr_dis of UART_PRINT_CONTROL,
167 {EFUSE_BLK0, 18, 1}, // [] wr_dis of FORCE_SEND_RESUME,
171 {EFUSE_BLK0, 18, 1}, // [] wr_dis of SECURE_VERSION,
175 {EFUSE_BLK0, 18, 1}, // [] wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE,
179 {EFUSE_BLK0, 19, 1}, // [] wr_dis of HYS_EN_PAD0,
183 {EFUSE_BLK0, 19, 1}, // [] wr_dis of HYS_EN_PAD1,
187 {EFUSE_BLK0, 20, 1}, // [] wr_dis of BLOCK1,
191 {EFUSE_BLK0, 20, 1}, // [WR_DIS.MAC_FACTORY] wr_dis of MAC,
195 {EFUSE_BLK0, 20, 1}, // [] wr_dis of MAC_EXT,
199 {EFUSE_BLK0, 20, 1}, // [] wr_dis of RXIQ_VERSION,
203 {EFUSE_BLK0, 20, 1}, // [] wr_dis of RXIQ_0,
207 {EFUSE_BLK0, 20, 1}, // [] wr_dis of RXIQ_1,
211 {EFUSE_BLK0, 20, 1}, // [] wr_dis of ACTIVE_HP_DBIAS,
215 {EFUSE_BLK0, 20, 1}, // [] wr_dis of ACTIVE_LP_DBIAS,
219 {EFUSE_BLK0, 20, 1}, // [] wr_dis of DSLP_DBIAS,
223 {EFUSE_BLK0, 20, 1}, // [] wr_dis of DBIAS_VOL_GAP,
227 {EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MINOR,
231 {EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MAJOR,
235 {EFUSE_BLK0, 20, 1}, // [] wr_dis of DISABLE_WAFER_VERSION_MAJOR,
239 {EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_CAP,
243 {EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_TEMP,
247 {EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_VENDOR,
251 {EFUSE_BLK0, 20, 1}, // [] wr_dis of PKG_VERSION,
255 {EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK2,
259 {EFUSE_BLK0, 21, 1}, // [] wr_dis of OPTIONAL_UNIQUE_ID,
263 {EFUSE_BLK0, 21, 1}, // [] wr_dis of BLK_VERSION_MINOR,
267 {EFUSE_BLK0, 21, 1}, // [] wr_dis of BLK_VERSION_MAJOR,
271 {EFUSE_BLK0, 21, 1}, // [] wr_dis of DISABLE_BLK_VERSION_MAJOR,
275 {EFUSE_BLK0, 21, 1}, // [] wr_dis of TEMP_CALIB,
279 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_AVE_INITCODE_ATTEN0,
283 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_AVE_INITCODE_ATTEN1,
287 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_AVE_INITCODE_ATTEN2,
291 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_AVE_INITCODE_ATTEN3,
295 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_HI_DOUT_ATTEN0,
299 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_HI_DOUT_ATTEN1,
303 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_HI_DOUT_ATTEN2,
307 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_HI_DOUT_ATTEN3,
311 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CH0_ATTEN0_INITCODE_DIFF,
315 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CH1_ATTEN0_INITCODE_DIFF,
319 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CH2_ATTEN0_INITCODE_DIFF,
323 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CH3_ATTEN0_INITCODE_DIFF,
327 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CH4_ATTEN0_INITCODE_DIFF,
331 {EFUSE_BLK0, 22, 1}, // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA,
335 {EFUSE_BLK0, 22, 1}, // [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC,
339 {EFUSE_BLK0, 23, 1}, // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0,
343 {EFUSE_BLK0, 24, 1}, // [WR_DIS.KEY1] wr_dis of BLOCK_KEY1,
347 {EFUSE_BLK0, 25, 1}, // [WR_DIS.KEY2] wr_dis of BLOCK_KEY2,
351 {EFUSE_BLK0, 26, 1}, // [WR_DIS.KEY3] wr_dis of BLOCK_KEY3,
355 {EFUSE_BLK0, 27, 1}, // [WR_DIS.KEY4] wr_dis of BLOCK_KEY4,
359 {EFUSE_BLK0, 28, 1}, // [WR_DIS.KEY5] wr_dis of BLOCK_KEY5,
363 {EFUSE_BLK0, 29, 1}, // [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2,
367 {EFUSE_BLK0, 30, 1}, // [] wr_dis of USB_EXCHG_PINS,
371 {EFUSE_BLK0, 30, 1}, // [] wr_dis of VDD_SPI_AS_GPIO,
375 {EFUSE_BLK0, 31, 1}, // [] wr_dis of SOFT_DIS_JTAG,
379 {EFUSE_BLK0, 32, 7}, // [] Disable reading from BlOCK4-10,
383 {EFUSE_BLK0, 32, 1}, // [RD_DIS.KEY0] rd_dis of BLOCK_KEY0,
387 {EFUSE_BLK0, 33, 1}, // [RD_DIS.KEY1] rd_dis of BLOCK_KEY1,
391 {EFUSE_BLK0, 34, 1}, // [RD_DIS.KEY2] rd_dis of BLOCK_KEY2,
395 {EFUSE_BLK0, 35, 1}, // [RD_DIS.KEY3] rd_dis of BLOCK_KEY3,
399 {EFUSE_BLK0, 36, 1}, // [RD_DIS.KEY4] rd_dis of BLOCK_KEY4,
403 {EFUSE_BLK0, 37, 1}, // [RD_DIS.KEY5] rd_dis of BLOCK_KEY5,
407 {EFUSE_BLK0, 38, 1}, // [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2,
411 …{EFUSE_BLK0, 40, 1}, // [] Represents whether icache is disabled or enabled. 1: disabled. 0: ena…
415 …{EFUSE_BLK0, 41, 1}, // [] Represents whether the function of usb switch to jtag is disabled or …
419 …{EFUSE_BLK0, 42, 1}, // [] Represents whether power glitch function is enabled. 1: enabled. 0: d…
423 …{EFUSE_BLK0, 44, 1}, // [] Represents whether the function that forces chip into download mode i…
427 …{EFUSE_BLK0, 45, 1}, // [] Represents whether SPI0 controller during boot_mode_download is disab…
431 …{EFUSE_BLK0, 46, 1}, // [DIS_CAN] Represents whether TWAI function is disabled or enabled. 1: di…
435 …{EFUSE_BLK0, 47, 1}, // [] Set this bit to enable selection between usb_to_jtag and pad_to_jtag …
439 …{EFUSE_BLK0, 48, 3}, // [] Represents whether JTAG is disabled in soft way. Odd number: disabled…
443 …{EFUSE_BLK0, 51, 1}, // [] Represents whether JTAG is disabled in the hard way(permanently). 1: …
447 …{EFUSE_BLK0, 52, 1}, // [] Represents whether flash encrypt function is disabled or enabled(exce…
451 …{EFUSE_BLK0, 57, 1}, // [] Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0: …
455 …{EFUSE_BLK0, 58, 1}, // [] Represents whether vdd spi pin is functioned as gpio. 1: functioned. …
459 …{EFUSE_BLK0, 59, 2}, // [] Configures the curve of ECDSA calculation: 0: only enable P256. 1: on…
463 {EFUSE_BLK0, 61, 1}, // [] Set this bit to permanently turn on ECC const-time mode,
467 …{EFUSE_BLK0, 62, 2}, // [] Set this bit to control the xts pseudo-round anti-dpa attack function…
471 …{EFUSE_BLK0, 80, 2}, // [] Represents whether RTC watchdog timeout threshold is selected at star…
475 …{EFUSE_BLK0, 82, 3}, // [] Enables flash encryption when 1 or 3 bits are set and disables otherw…
479 {EFUSE_BLK0, 85, 1}, // [] Revoke 1st secure boot key,
483 {EFUSE_BLK0, 86, 1}, // [] Revoke 2nd secure boot key,
487 {EFUSE_BLK0, 87, 1}, // [] Revoke 3rd secure boot key,
491 {EFUSE_BLK0, 88, 4}, // [KEY0_PURPOSE] Represents the purpose of Key0,
495 {EFUSE_BLK0, 92, 4}, // [KEY1_PURPOSE] Represents the purpose of Key1,
499 {EFUSE_BLK0, 96, 4}, // [KEY2_PURPOSE] Represents the purpose of Key2,
503 {EFUSE_BLK0, 100, 4}, // [KEY3_PURPOSE] Represents the purpose of Key3,
507 {EFUSE_BLK0, 104, 4}, // [KEY4_PURPOSE] Represents the purpose of Key4,
511 {EFUSE_BLK0, 108, 4}, // [KEY5_PURPOSE] Represents the purpose of Key5,
515 …{EFUSE_BLK0, 112, 2}, // [] Represents the spa secure level by configuring the clock random divi…
519 …{EFUSE_BLK0, 115, 1}, // [] Represents whether anti-dpa attack is enabled. 1:enabled. 0: disable…
523 …{EFUSE_BLK0, 116, 1}, // [] Represents whether secure boot is enabled or disabled. 1: enabled. 0…
527 …{EFUSE_BLK0, 117, 1}, // [] Represents whether revoking aggressive secure boot is enabled or dis…
531 {EFUSE_BLK0, 118, 5}, // [] Set these bits to enable power glitch function when chip power on,
535 …{EFUSE_BLK0, 124, 4}, // [] Represents the flash waiting time after power-up; in unit of ms. Whe…
539 …{EFUSE_BLK0, 128, 1}, // [] Represents whether Download mode is disabled or enabled. 1: disabled…
543 …{EFUSE_BLK0, 129, 1}, // [] Represents whether direct boot mode is disabled or enabled. 1: disab…
547 …{EFUSE_BLK0, 130, 1}, // [DIS_USB_PRINT] Set this bit to disable USB-Serial-JTAG print during ro…
551 …{EFUSE_BLK0, 132, 1}, // [] Represents whether the USB-Serial-JTAG download function is disabled…
555 …{EFUSE_BLK0, 133, 1}, // [] Represents whether security download is enabled or disabled. 1: enab…
559 …{EFUSE_BLK0, 134, 2}, // [] Set the default UARTboot message output mode {0: "Enable"; 1: "Enabl…
563 …{EFUSE_BLK0, 136, 1}, // [] Represents whether ROM code is forced to send a resume command durin…
567 {EFUSE_BLK0, 137, 16}, // [] Represents the version used by ESP-IDF anti-rollback feature,
571 …{EFUSE_BLK0, 153, 1}, // [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when S…
575 {EFUSE_BLK0, 154, 6}, // [] Set bits to enable hysteresis function of PAD0~5,
579 {EFUSE_BLK0, 160, 22}, // [] Set bits to enable hysteresis function of PAD6~27,