Lines Matching refs:EFUSE_BLK1
539 {EFUSE_BLK1, 40, 8}, // [MAC_FACTORY] MAC address,
540 {EFUSE_BLK1, 32, 8}, // [MAC_FACTORY] MAC address,
541 {EFUSE_BLK1, 24, 8}, // [MAC_FACTORY] MAC address,
542 {EFUSE_BLK1, 16, 8}, // [MAC_FACTORY] MAC address,
543 {EFUSE_BLK1, 8, 8}, // [MAC_FACTORY] MAC address,
544 {EFUSE_BLK1, 0, 8}, // [MAC_FACTORY] MAC address,
548 {EFUSE_BLK1, 48, 6}, // [] SPI PAD CLK,
552 {EFUSE_BLK1, 54, 6}, // [] SPI PAD Q(D1),
556 {EFUSE_BLK1, 60, 6}, // [] SPI PAD D(D0),
560 {EFUSE_BLK1, 66, 6}, // [] SPI PAD CS,
564 {EFUSE_BLK1, 72, 6}, // [] SPI PAD HD(D3),
568 {EFUSE_BLK1, 78, 6}, // [] SPI PAD WP(D2),
572 {EFUSE_BLK1, 84, 6}, // [] SPI PAD DQS,
576 {EFUSE_BLK1, 90, 6}, // [] SPI PAD D4,
580 {EFUSE_BLK1, 96, 6}, // [] SPI PAD D5,
584 {EFUSE_BLK1, 102, 6}, // [] SPI PAD D6,
588 {EFUSE_BLK1, 108, 6}, // [] SPI PAD D7,
592 {EFUSE_BLK1, 114, 3}, // [] WAFER_VERSION_MINOR least significant bits,
596 {EFUSE_BLK1, 117, 3}, // [] Package version,
600 {EFUSE_BLK1, 120, 3}, // [] BLK_VERSION_MINOR,
604 {EFUSE_BLK1, 135, 7}, // [] BLOCK1 K_RTC_LDO,
608 {EFUSE_BLK1, 142, 7}, // [] BLOCK1 K_DIG_LDO,
612 {EFUSE_BLK1, 149, 8}, // [] BLOCK1 voltage of rtc dbias20,
616 {EFUSE_BLK1, 157, 8}, // [] BLOCK1 voltage of digital dbias20,
620 {EFUSE_BLK1, 165, 5}, // [] BLOCK1 digital dbias when hvt,
624 {EFUSE_BLK1, 170, 10}, // [] BLOCK1 pvt threshold when hvt,
628 {EFUSE_BLK1, 183, 1}, // [] WAFER_VERSION_MINOR most significant bit,
632 {EFUSE_BLK1, 184, 2}, // [] WAFER_VERSION_MAJOR,