Lines Matching refs:EFUSE_BLK0
19 {EFUSE_BLK0, 0, 32}, // [] Disable programming of individual eFuses,
23 {EFUSE_BLK0, 0, 1}, // [] wr_dis of RD_DIS,
27 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_ICACHE,
31 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_USB_JTAG,
35 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_DOWNLOAD_ICACHE,
39 {EFUSE_BLK0, 2, 1}, // [WR_DIS.DIS_USB_DEVICE] wr_dis of DIS_USB_SERIAL_JTAG,
43 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_FORCE_DOWNLOAD,
47 {EFUSE_BLK0, 2, 1}, // [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI,
51 {EFUSE_BLK0, 2, 1}, // [] wr_dis of JTAG_SEL_ENABLE,
55 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_PAD_JTAG,
59 {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT,
63 {EFUSE_BLK0, 3, 1}, // [] wr_dis of WDT_DELAY_SEL,
67 {EFUSE_BLK0, 4, 1}, // [] wr_dis of SPI_BOOT_CRYPT_CNT,
71 {EFUSE_BLK0, 5, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE0,
75 {EFUSE_BLK0, 6, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE1,
79 {EFUSE_BLK0, 7, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE2,
83 {EFUSE_BLK0, 8, 1}, // [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0,
87 {EFUSE_BLK0, 9, 1}, // [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1,
91 {EFUSE_BLK0, 10, 1}, // [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2,
95 {EFUSE_BLK0, 11, 1}, // [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3,
99 {EFUSE_BLK0, 12, 1}, // [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4,
103 {EFUSE_BLK0, 13, 1}, // [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5,
107 {EFUSE_BLK0, 15, 1}, // [] wr_dis of SECURE_BOOT_EN,
111 {EFUSE_BLK0, 16, 1}, // [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE,
115 {EFUSE_BLK0, 18, 1}, // [] wr_dis of FLASH_TPUW,
119 {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_DOWNLOAD_MODE,
123 {EFUSE_BLK0, 18, 1}, // [WR_DIS.DIS_LEGACY_SPI_BOOT] wr_dis of DIS_DIRECT_BOOT,
127 {EFUSE_BLK0, 18, 1}, // [WR_DIS.UART_PRINT_CHANNEL] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT,
131 …{EFUSE_BLK0, 18, 1}, // [WR_DIS.DIS_USB_DOWNLOAD_MODE] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MO…
135 {EFUSE_BLK0, 18, 1}, // [] wr_dis of ENABLE_SECURITY_DOWNLOAD,
139 {EFUSE_BLK0, 18, 1}, // [] wr_dis of UART_PRINT_CONTROL,
143 {EFUSE_BLK0, 18, 1}, // [] wr_dis of FORCE_SEND_RESUME,
147 {EFUSE_BLK0, 18, 1}, // [] wr_dis of SECURE_VERSION,
151 {EFUSE_BLK0, 19, 1}, // [] wr_dis of ERR_RST_ENABLE,
155 {EFUSE_BLK0, 19, 1}, // [] wr_dis of DISABLE_WAFER_VERSION_MAJOR,
159 {EFUSE_BLK0, 19, 1}, // [] wr_dis of DISABLE_BLK_VERSION_MAJOR,
163 {EFUSE_BLK0, 20, 1}, // [] wr_dis of BLOCK1,
167 {EFUSE_BLK0, 20, 1}, // [WR_DIS.MAC_FACTORY] wr_dis of MAC,
171 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_CLK,
175 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_Q,
179 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_D,
183 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_CS,
187 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_HD,
191 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_WP,
195 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_DQS,
199 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_D4,
203 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_D5,
207 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_D6,
211 {EFUSE_BLK0, 20, 1}, // [] wr_dis of SPI_PAD_CONFIG_D7,
215 {EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MINOR_LO,
219 {EFUSE_BLK0, 20, 1}, // [] wr_dis of PKG_VERSION,
223 {EFUSE_BLK0, 20, 1}, // [] wr_dis of BLK_VERSION_MINOR,
227 {EFUSE_BLK0, 20, 1}, // [] wr_dis of K_RTC_LDO,
231 {EFUSE_BLK0, 20, 1}, // [] wr_dis of K_DIG_LDO,
235 {EFUSE_BLK0, 20, 1}, // [] wr_dis of V_RTC_DBIAS20,
239 {EFUSE_BLK0, 20, 1}, // [] wr_dis of V_DIG_DBIAS20,
243 {EFUSE_BLK0, 20, 1}, // [] wr_dis of DIG_DBIAS_HVT,
247 {EFUSE_BLK0, 20, 1}, // [] wr_dis of THRES_HVT,
251 {EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MINOR_HI,
255 {EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MAJOR,
259 {EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK2,
263 {EFUSE_BLK0, 21, 1}, // [] wr_dis of OPTIONAL_UNIQUE_ID,
267 {EFUSE_BLK0, 21, 1}, // [] wr_dis of BLK_VERSION_MAJOR,
271 {EFUSE_BLK0, 21, 1}, // [] wr_dis of TEMP_CALIB,
275 {EFUSE_BLK0, 21, 1}, // [] wr_dis of OCODE,
279 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN0,
283 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN1,
287 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN2,
291 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN3,
295 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CAL_VOL_ATTEN0,
299 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CAL_VOL_ATTEN1,
303 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CAL_VOL_ATTEN2,
307 {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CAL_VOL_ATTEN3,
311 {EFUSE_BLK0, 22, 1}, // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA,
315 {EFUSE_BLK0, 22, 1}, // [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC,
319 {EFUSE_BLK0, 23, 1}, // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0,
323 {EFUSE_BLK0, 24, 1}, // [WR_DIS.KEY1] wr_dis of BLOCK_KEY1,
327 {EFUSE_BLK0, 25, 1}, // [WR_DIS.KEY2] wr_dis of BLOCK_KEY2,
331 {EFUSE_BLK0, 26, 1}, // [WR_DIS.KEY3] wr_dis of BLOCK_KEY3,
335 {EFUSE_BLK0, 27, 1}, // [WR_DIS.KEY4] wr_dis of BLOCK_KEY4,
339 {EFUSE_BLK0, 28, 1}, // [WR_DIS.KEY5] wr_dis of BLOCK_KEY5,
343 {EFUSE_BLK0, 29, 1}, // [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2,
347 {EFUSE_BLK0, 30, 1}, // [] wr_dis of USB_EXCHG_PINS,
351 {EFUSE_BLK0, 30, 1}, // [] wr_dis of VDD_SPI_AS_GPIO,
355 {EFUSE_BLK0, 31, 1}, // [] wr_dis of SOFT_DIS_JTAG,
359 {EFUSE_BLK0, 32, 7}, // [] Disable reading from BlOCK4-10,
363 {EFUSE_BLK0, 32, 1}, // [RD_DIS.KEY0] rd_dis of BLOCK_KEY0,
367 {EFUSE_BLK0, 33, 1}, // [RD_DIS.KEY1] rd_dis of BLOCK_KEY1,
371 {EFUSE_BLK0, 34, 1}, // [RD_DIS.KEY2] rd_dis of BLOCK_KEY2,
375 {EFUSE_BLK0, 35, 1}, // [RD_DIS.KEY3] rd_dis of BLOCK_KEY3,
379 {EFUSE_BLK0, 36, 1}, // [RD_DIS.KEY4] rd_dis of BLOCK_KEY4,
383 {EFUSE_BLK0, 37, 1}, // [RD_DIS.KEY5] rd_dis of BLOCK_KEY5,
387 {EFUSE_BLK0, 38, 1}, // [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2,
391 {EFUSE_BLK0, 40, 1}, // [] Set this bit to disable Icache,
395 …{EFUSE_BLK0, 41, 1}, // [] Set this bit to disable function of usb switch to jtag in module of u…
399 …{EFUSE_BLK0, 42, 1}, // [] Set this bit to disable Icache in download mode (boot_mode[3:0] is 0;…
403 {EFUSE_BLK0, 43, 1}, // [DIS_USB_DEVICE] USB-Serial-JTAG {0: "Enable"; 1: "Disable"},
407 …{EFUSE_BLK0, 44, 1}, // [] Set this bit to disable the function that forces chip into download m…
411 {EFUSE_BLK0, 46, 1}, // [DIS_CAN] Set this bit to disable CAN function,
415 …{EFUSE_BLK0, 47, 1}, // [] Set this bit to enable selection between usb_to_jtag and pad_to_jtag …
419 …{EFUSE_BLK0, 48, 3}, // [] Set these bits to disable JTAG in the soft way (odd number 1 means di…
423 …{EFUSE_BLK0, 51, 1}, // [] Set this bit to disable JTAG in the hard way. JTAG is disabled perman…
427 … {EFUSE_BLK0, 52, 1}, // [] Set this bit to disable flash encryption when in download boot modes,
431 {EFUSE_BLK0, 57, 1}, // [] Set this bit to exchange USB D+ and D- pins,
435 {EFUSE_BLK0, 58, 1}, // [] Set this bit to vdd spi pin function as gpio,
439 …{EFUSE_BLK0, 80, 2}, // [] RTC watchdog timeout threshold; in unit of slow clock cycle {0: "4000…
443 …{EFUSE_BLK0, 82, 3}, // [] Enables flash encryption when 1 or 3 bits are set and disables otherw…
447 {EFUSE_BLK0, 85, 1}, // [] Revoke 1st secure boot key,
451 {EFUSE_BLK0, 86, 1}, // [] Revoke 2nd secure boot key,
455 {EFUSE_BLK0, 87, 1}, // [] Revoke 3rd secure boot key,
459 {EFUSE_BLK0, 88, 4}, // [KEY0_PURPOSE] Purpose of Key0,
463 {EFUSE_BLK0, 92, 4}, // [KEY1_PURPOSE] Purpose of Key1,
467 {EFUSE_BLK0, 96, 4}, // [KEY2_PURPOSE] Purpose of Key2,
471 {EFUSE_BLK0, 100, 4}, // [KEY3_PURPOSE] Purpose of Key3,
475 {EFUSE_BLK0, 104, 4}, // [KEY4_PURPOSE] Purpose of Key4,
479 {EFUSE_BLK0, 108, 4}, // [KEY5_PURPOSE] Purpose of Key5,
483 {EFUSE_BLK0, 116, 1}, // [] Set this bit to enable secure boot,
487 {EFUSE_BLK0, 117, 1}, // [] Set this bit to enable revoking aggressive secure boot,
491 …{EFUSE_BLK0, 124, 4}, // [] Configures flash waiting time after power-up; in unit of ms. If the …
495 …{EFUSE_BLK0, 128, 1}, // [] Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 3; …
499 {EFUSE_BLK0, 129, 1}, // [DIS_LEGACY_SPI_BOOT] Disable direct boot mode,
503 {EFUSE_BLK0, 130, 1}, // [UART_PRINT_CHANNEL] USB printing {0: "Enable"; 1: "Disable"},
507 …{EFUSE_BLK0, 132, 1}, // [DIS_USB_DOWNLOAD_MODE] Disable UART download mode through USB-Serial-J…
511 {EFUSE_BLK0, 133, 1}, // [] Set this bit to enable secure UART download mode,
515 …{EFUSE_BLK0, 134, 2}, // [] Set the default UARTboot message output mode {0: "Enable"; 1: "Enabl…
519 …{EFUSE_BLK0, 141, 1}, // [] Set this bit to force ROM code to send a resume command during SPI b…
523 {EFUSE_BLK0, 142, 16}, // [] Secure version (used by ESP-IDF anti-rollback feature),
527 …{EFUSE_BLK0, 159, 1}, // [] Use BLOCK0 to check error record registers {0: "without check"; 1: "…
531 {EFUSE_BLK0, 160, 1}, // [] Disables check of wafer version major,
535 {EFUSE_BLK0, 161, 1}, // [] Disables check of blk version major,