Lines Matching refs:slot_cfg
131 i2s_hal_slot_config_t slot_cfg; member
480 i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg; in i2s_get_buf_size() local
482 uint32_t bytes_per_sample = ((slot_cfg->data_bit_width + 15) / 16) * 2; in i2s_get_buf_size()
673 i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg; in i2s_calculate_adc_dac_clock() local
674 uint32_t slot_bits = slot_cfg->slot_bit_width; in i2s_calculate_adc_dac_clock()
755 i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg; in i2s_calculate_common_clock() local
758 uint32_t slot_bits = slot_cfg->slot_bit_width; in i2s_calculate_common_clock()
823 i2s_hal_slot_config_t *slot_cfg = &p_i2s[0]->slot_cfg; in i2s_dac_set_slot_legacy() local
827 i2s_ll_tx_set_sample_bit(dev, slot_cfg->slot_bit_width, slot_cfg->data_bit_width); in i2s_dac_set_slot_legacy()
828 i2s_ll_tx_enable_mono_mode(dev, slot_cfg->slot_mode == I2S_SLOT_MODE_MONO); in i2s_dac_set_slot_legacy()
830 i2s_ll_tx_set_ws_width(dev, slot_cfg->slot_bit_width); in i2s_dac_set_slot_legacy()
864 i2s_hal_slot_config_t *slot_cfg = &p_i2s[0]->slot_cfg; in i2s_adc_set_slot_legacy() local
867 i2s_ll_rx_set_sample_bit(dev, slot_cfg->slot_bit_width, slot_cfg->data_bit_width); in i2s_adc_set_slot_legacy()
870 i2s_ll_rx_set_ws_width(dev, slot_cfg->slot_bit_width); in i2s_adc_set_slot_legacy()
977 …x_slot(&(p_i2s[i2s_num]->hal), is_tx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg) ); in i2s_set_slot_legacy()
980 …x_slot(&(p_i2s[i2s_num]->hal), is_rx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg) ); in i2s_set_slot_legacy()
987 …x_slot(&(p_i2s[i2s_num]->hal), is_tx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg) ); in i2s_set_slot_legacy()
992 …x_slot(&(p_i2s[i2s_num]->hal), is_rx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg) ); in i2s_set_slot_legacy()
1000 …x_slot(&(p_i2s[i2s_num]->hal), is_tx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg) ); in i2s_set_slot_legacy()
1003 …x_slot(&(p_i2s[i2s_num]->hal), is_rx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg) ); in i2s_set_slot_legacy()
1056 i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg; in i2s_set_clk() local
1059 slot_cfg->data_bit_width = bits_cfg & 0xFFFF; in i2s_set_clk()
1060 …ESP_RETURN_ON_FALSE((slot_cfg->data_bit_width % 8 == 0), ESP_ERR_INVALID_ARG, TAG, "Invalid bits p… in i2s_set_clk()
1061 slot_cfg->slot_bit_width = (bits_cfg >> 16) > slot_cfg->data_bit_width ? in i2s_set_clk()
1062 (bits_cfg >> 16) : slot_cfg->data_bit_width; in i2s_set_clk()
1063 …ESP_RETURN_ON_FALSE((slot_cfg->slot_bit_width % 8 == 0), ESP_ERR_INVALID_ARG, TAG, "Invalid bits p… in i2s_set_clk()
1064 …ESP_RETURN_ON_FALSE(((int)slot_cfg->slot_bit_width <= (int)I2S_BITS_PER_SAMPLE_32BIT), ESP_ERR_INV… in i2s_set_clk()
1065 …slot_cfg->slot_mode = ((ch & 0xFFFF) == I2S_CHANNEL_MONO) ? I2S_SLOT_MODE_MONO : I2S_SLOT_MODE_STE… in i2s_set_clk()
1067 if (slot_cfg->slot_mode == I2S_SLOT_MODE_MONO) { in i2s_set_clk()
1068 if (slot_cfg->std.slot_mask == I2S_STD_SLOT_BOTH) { in i2s_set_clk()
1069 slot_cfg->std.slot_mask = I2S_STD_SLOT_LEFT; in i2s_set_clk()
1072 slot_cfg->std.ws_pol = !slot_cfg->std.ws_pol; in i2s_set_clk()
1076 slot_cfg->std.slot_mask = I2S_STD_SLOT_BOTH; in i2s_set_clk()
1083 slot_mask = (slot_cfg->slot_mode == I2S_SLOT_MODE_MONO) ? 1 : 2; in i2s_set_clk()
1091 p_i2s[i2s_num]->active_slot = (slot_cfg->slot_mode == I2S_SLOT_MODE_MONO) ? 1 : 2; in i2s_set_clk()
1134 i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg; in i2s_set_sample_rates() local
1138 mask = slot_cfg->tdm.slot_mask; in i2s_set_sample_rates()
1141 return i2s_set_clk(i2s_num, rate, slot_cfg->data_bit_width, slot_cfg->slot_mode | (mask << 16)); in i2s_set_sample_rates()
1190 …s[i2s_num]->clk_cfg.sample_rate_hz, p_i2s[i2s_num]->slot_cfg.data_bit_width, p_i2s[i2s_num]->slot_… in i2s_set_pdm_rx_down_sample()
1208 …s[i2s_num]->clk_cfg.sample_rate_hz, p_i2s[i2s_num]->slot_cfg.data_bit_width, p_i2s[i2s_num]->slot_… in i2s_set_pdm_tx_up_sample()
1266 #define SLOT_CFG(m) p_i2s[i2s_num]->slot_cfg.m in i2s_config_transfer()
1269 p_i2s[i2s_num]->slot_cfg.data_bit_width = i2s_config->bits_per_sample; in i2s_config_transfer()
1270 …p_i2s[i2s_num]->slot_cfg.slot_bit_width = (int)i2s_config->bits_per_chan < (int)i2s_config->bits_p… in i2s_config_transfer()
1273 p_i2s[i2s_num]->slot_cfg.slot_mode = i2s_config->channel_format < I2S_CHANNEL_FMT_ONLY_RIGHT ? in i2s_config_transfer()
1314 …p_i2s[i2s_num]->active_slot = (int)p_i2s[i2s_num]->slot_cfg.slot_mode == I2S_SLOT_MODE_MONO ? 1 : … in i2s_config_transfer()
1337 …p_i2s[i2s_num]->active_slot = (int)p_i2s[i2s_num]->slot_cfg.slot_mode == I2S_SLOT_MODE_MONO ? 1 : … in i2s_config_transfer()
1347 …p_i2s[i2s_num]->active_slot = (int)p_i2s[i2s_num]->slot_cfg.slot_mode == I2S_SLOT_MODE_MONO ? 1 : … in i2s_config_transfer()
1359 p_i2s[i2s_num]->slot_cfg.slot_mode = I2S_SLOT_MODE_STEREO; in i2s_config_transfer()
1369 SLOT_CFG(tdm).ws_width = p_i2s[i2s_num]->slot_cfg.slot_bit_width; in i2s_config_transfer()
1388 p_i2s[i2s_num]->slot_cfg.slot_mode = (p_i2s[i2s_num]->dir & I2S_DIR_TX_) ? in i2s_config_transfer()