Lines Matching refs:SLOT_CFG
1266 #define SLOT_CFG(m) p_i2s[i2s_num]->slot_cfg.m in i2s_config_transfer() macro
1288 SLOT_CFG(std).ws_width = i2s_config->bits_per_sample; in i2s_config_transfer()
1289 SLOT_CFG(std).ws_pol = false; in i2s_config_transfer()
1291 SLOT_CFG(std).slot_mask = I2S_STD_SLOT_BOTH; in i2s_config_transfer()
1294 SLOT_CFG(std).slot_mask = I2S_STD_SLOT_LEFT; in i2s_config_transfer()
1296 SLOT_CFG(std).slot_mask = I2S_STD_SLOT_RIGHT; in i2s_config_transfer()
1299 SLOT_CFG(std).bit_shift = true; in i2s_config_transfer()
1302 SLOT_CFG(std).bit_shift = true; in i2s_config_transfer()
1303 SLOT_CFG(std).ws_width = 1; in i2s_config_transfer()
1304 SLOT_CFG(std).ws_pol = true; in i2s_config_transfer()
1307 SLOT_CFG(std).msb_right = true; in i2s_config_transfer()
1309 SLOT_CFG(std).left_align = i2s_config->left_align; in i2s_config_transfer()
1310 SLOT_CFG(std).big_endian = i2s_config->big_edin; in i2s_config_transfer()
1311 SLOT_CFG(std).bit_order_lsb = i2s_config->bit_order_msb; // The old name is incorrect in i2s_config_transfer()
1321 SLOT_CFG(pdm_tx).sd_prescale = 0; in i2s_config_transfer()
1322 SLOT_CFG(pdm_tx).sd_scale = I2S_PDM_SIG_SCALING_MUL_1; in i2s_config_transfer()
1323 SLOT_CFG(pdm_tx).hp_scale = I2S_PDM_SIG_SCALING_MUL_1; in i2s_config_transfer()
1324 SLOT_CFG(pdm_tx).lp_scale = I2S_PDM_SIG_SCALING_MUL_1; in i2s_config_transfer()
1325 SLOT_CFG(pdm_tx).sinc_scale = I2S_PDM_SIG_SCALING_MUL_1; in i2s_config_transfer()
1327 SLOT_CFG(pdm_tx).line_mode = I2S_PDM_TX_ONE_LINE_CODEC; in i2s_config_transfer()
1328 SLOT_CFG(pdm_tx).hp_en = true; in i2s_config_transfer()
1329 SLOT_CFG(pdm_tx).hp_cut_off_freq_hz = 49; in i2s_config_transfer()
1330 SLOT_CFG(pdm_tx).sd_dither = 0; in i2s_config_transfer()
1331 SLOT_CFG(pdm_tx).sd_dither2 = 1; in i2s_config_transfer()
1356 SLOT_CFG(tdm).slot_mask = i2s_config->chan_mask >> 16; in i2s_config_transfer()
1358 SLOT_CFG(tdm).ws_width = 0; // I2S_TDM_AUTO_WS_WIDTH in i2s_config_transfer()
1360 SLOT_CFG(tdm).ws_pol = false; in i2s_config_transfer()
1362 SLOT_CFG(tdm).bit_shift = true; in i2s_config_transfer()
1364 SLOT_CFG(tdm).bit_shift = true; in i2s_config_transfer()
1365 SLOT_CFG(tdm).ws_width = 1; in i2s_config_transfer()
1366 SLOT_CFG(tdm).ws_pol = true; in i2s_config_transfer()
1368 SLOT_CFG(tdm).bit_shift = true; in i2s_config_transfer()
1369 SLOT_CFG(tdm).ws_width = p_i2s[i2s_num]->slot_cfg.slot_bit_width; in i2s_config_transfer()
1370 SLOT_CFG(tdm).ws_pol = true; in i2s_config_transfer()
1372 SLOT_CFG(tdm).left_align = i2s_config->left_align; in i2s_config_transfer()
1373 SLOT_CFG(tdm).big_endian = i2s_config->big_edin; in i2s_config_transfer()
1374 SLOT_CFG(tdm).bit_order_lsb = i2s_config->bit_order_msb; // The old name is incorrect in i2s_config_transfer()
1375 SLOT_CFG(tdm).skip_mask = i2s_config->skip_msk; in i2s_config_transfer()
1378 p_i2s[i2s_num]->active_slot = __builtin_popcount(SLOT_CFG(tdm).slot_mask); in i2s_config_transfer()
1379 uint32_t mx_slot = 32 - __builtin_clz(SLOT_CFG(tdm).slot_mask); in i2s_config_transfer()
1395 #undef SLOT_CFG in i2s_config_transfer()