Lines Matching refs:R0
6 ULP coprocessor has 4 16-bit general purpose registers, labeled R0, R1, R2, R3. It also has an 8-bi…
710 **JUMPR** – Jump to a relative offset (condition based on R0)
720 - *EQ* (equal) – jump if value in R0 == threshold
721 - *LT* (less than) – jump if value in R0 < threshold
722 - *LE* (less or equal) – jump if value in R0 <= threshold
723 - *GT* (greater than) – jump if value in R0 > threshold
724 - *GE* (greater or equal) – jump if value in R0 >= threshold
744 …ive address if condition is true. Condition is the result of comparison of R0 register value and t…
748 1:pos: JUMPR 16, 20, GE // Jump to address (position + 16 bytes) if value in R0 >= 20
750 2: // Down counting loop using R0 register
751 MOVE R0, 16 // load 16 into R0
752 label: SUB R0, R0, 1 // R0--
754 JUMPR label, 1, GE // jump to label if R0 >= 1
1020 …p to 16 bits from a peripheral register into a general purpose register: ``R0 = REG[Addr][High:Low…
1028 1: REG_RD 0x120, 7, 4 // load 4 bits: R0 = {12'b0, REG[0x120][7:4]}
1067 Read up to 16 bits from rtc_reg[low_bit + bit_width - 1 : low_bit] into R0. For example::
1072 /* Read 16 lower bits of RTC_CNTL_TIME0_REG into R0 */
1076 Read from a field in rtc_reg into R0, up to 16 bits. For example::
1081 /* Read 8-bit SENS_TSENS_OUT field of SENS_SAR_SLAVE_ADDR3_REG into R0 */