Lines Matching refs:i2c_context
184 static i2c_context_t i2c_context[I2C_NUM_MAX] = { variable
215 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_hw_disable()
216 if (i2c_context[i2c_num].hw_enabled != false) { in i2c_hw_disable()
218 i2c_context[i2c_num].hw_enabled = false; in i2c_hw_disable()
220 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_hw_disable()
225 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_hw_enable()
226 if (i2c_context[i2c_num].hw_enabled != true) { in i2c_hw_enable()
228 i2c_context[i2c_num].hw_enabled = true; in i2c_hw_enable()
230 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_hw_enable()
346 i2c_hal_disable_intr_mask(&(i2c_context[i2c_num].hal), I2C_LL_INTR_MASK); in i2c_driver_install()
347 i2c_hal_clr_intsts_mask(&(i2c_context[i2c_num].hal), I2C_LL_INTR_MASK); in i2c_driver_install()
352 i2c_hal_enable_slave_rx_it(&(i2c_context[i2c_num].hal)); in i2c_driver_install()
406 i2c_hal_disable_intr_mask(&(i2c_context[i2c_num].hal), I2C_LL_INTR_MASK); in i2c_driver_delete()
460 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_reset_tx_fifo()
461 i2c_hal_txfifo_rst(&(i2c_context[i2c_num].hal)); in i2c_reset_tx_fifo()
462 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_reset_tx_fifo()
469 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_reset_rx_fifo()
470 i2c_hal_rxfifo_rst(&(i2c_context[i2c_num].hal)); in i2c_reset_rx_fifo()
471 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_reset_rx_fifo()
483 i2c_hal_master_handle_tx_event(&(i2c_context[i2c_num].hal), &evt_type); in i2c_isr_handler_default()
485 i2c_hal_master_handle_rx_event(&(i2c_context[i2c_num].hal), &evt_type); in i2c_isr_handler_default()
508 i2c_hal_slave_handle_event(&(i2c_context[i2c_num].hal), &evt_type); in i2c_isr_handler_default()
511 i2c_hal_get_rxfifo_cnt(&(i2c_context[i2c_num].hal), &rx_fifo_cnt); in i2c_isr_handler_default()
512 i2c_hal_read_rxfifo(&(i2c_context[i2c_num].hal), p_i2c->data_buf, rx_fifo_cnt); in i2c_isr_handler_default()
514 i2c_hal_slave_clr_rx_it(&(i2c_context[i2c_num].hal)); in i2c_isr_handler_default()
517 i2c_hal_get_txfifo_cnt(&(i2c_context[i2c_num].hal), &tx_fifo_rem); in i2c_isr_handler_default()
521 i2c_hal_write_txfifo(&(i2c_context[i2c_num].hal), data, size); in i2c_isr_handler_default()
524 i2c_hal_disable_slave_tx_it(&(i2c_context[i2c_num].hal)); in i2c_isr_handler_default()
526 i2c_hal_slave_clr_tx_it(&(i2c_context[i2c_num].hal)); in i2c_isr_handler_default()
540 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_data_mode()
541 i2c_hal_set_data_mode(&(i2c_context[i2c_num].hal), tx_trans_mode, rx_trans_mode); in i2c_set_data_mode()
542 i2c_hal_update_config(&(i2c_context[i2c_num].hal)); in i2c_set_data_mode()
543 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_data_mode()
550 i2c_hal_get_data_mode(&(i2c_context[i2c_num].hal), tx_trans_mode, rx_trans_mode); in i2c_get_data_mode()
564 int scl_io = i2c_context[i2c_num].scl_io_num; in i2c_master_clear_bus()
565 int sda_io = i2c_context[i2c_num].sda_io_num; in i2c_master_clear_bus()
588 i2c_hal_master_clr_bus(&(i2c_context[i2c_num].hal)); in i2c_master_clear_bus()
607 i2c_hal_get_scl_timing(&(i2c_context[i2c_num].hal), &scl_high_period, &scl_low_period); in i2c_hw_fsm_reset()
608 i2c_hal_get_start_timing(&(i2c_context[i2c_num].hal), &scl_rstart_setup, &scl_start_hold); in i2c_hw_fsm_reset()
609 i2c_hal_get_stop_timing(&(i2c_context[i2c_num].hal), &scl_stop_setup, &scl_stop_hold); in i2c_hw_fsm_reset()
610 i2c_hal_get_sda_timing(&(i2c_context[i2c_num].hal), &sda_sample, &sda_hold); in i2c_hw_fsm_reset()
611 i2c_hal_get_tout(&(i2c_context[i2c_num].hal), &timeout); in i2c_hw_fsm_reset()
612 i2c_hal_get_filter(&(i2c_context[i2c_num].hal), &filter_cfg); in i2c_hw_fsm_reset()
619 i2c_hal_master_init(&(i2c_context[i2c_num].hal), i2c_num); in i2c_hw_fsm_reset()
620 i2c_hal_disable_intr_mask(&(i2c_context[i2c_num].hal), I2C_LL_INTR_MASK); in i2c_hw_fsm_reset()
621 i2c_hal_clr_intsts_mask(&(i2c_context[i2c_num].hal), I2C_LL_INTR_MASK); in i2c_hw_fsm_reset()
622 i2c_hal_set_scl_timing(&(i2c_context[i2c_num].hal), scl_high_period, scl_low_period); in i2c_hw_fsm_reset()
623 i2c_hal_set_start_timing(&(i2c_context[i2c_num].hal), scl_rstart_setup, scl_start_hold); in i2c_hw_fsm_reset()
624 i2c_hal_set_stop_timing(&(i2c_context[i2c_num].hal), scl_stop_setup, scl_stop_hold); in i2c_hw_fsm_reset()
625 i2c_hal_set_sda_timing(&(i2c_context[i2c_num].hal), sda_sample, sda_hold); in i2c_hw_fsm_reset()
626 i2c_hal_set_tout(&(i2c_context[i2c_num].hal), timeout); in i2c_hw_fsm_reset()
627 i2c_hal_set_filter(&(i2c_context[i2c_num].hal), filter_cfg); in i2c_hw_fsm_reset()
629 i2c_hal_master_fsm_rst(&(i2c_context[i2c_num].hal)); in i2c_hw_fsm_reset()
681 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_param_config()
682 i2c_hal_disable_intr_mask(&(i2c_context[i2c_num].hal), I2C_LL_INTR_MASK); in i2c_param_config()
683 i2c_hal_clr_intsts_mask(&(i2c_context[i2c_num].hal), I2C_LL_INTR_MASK); in i2c_param_config()
685 i2c_hal_slave_init(&(i2c_context[i2c_num].hal), i2c_num); in i2c_param_config()
686 i2c_hal_set_source_clk(&(i2c_context[i2c_num].hal), src_clk); in i2c_param_config()
687 …i2c_hal_set_slave_addr(&(i2c_context[i2c_num].hal), i2c_conf->slave.slave_addr, i2c_conf->slave.ad… in i2c_param_config()
688 i2c_hal_set_rxfifo_full_thr(&(i2c_context[i2c_num].hal), I2C_FIFO_FULL_THRESH_VAL); in i2c_param_config()
689 i2c_hal_set_txfifo_empty_thr(&(i2c_context[i2c_num].hal), I2C_FIFO_EMPTY_THRESH_VAL); in i2c_param_config()
691 …i2c_hal_set_sda_timing(&(i2c_context[i2c_num].hal), I2C_SLAVE_SDA_SAMPLE_DEFAULT, I2C_SLAVE_SDA_HO… in i2c_param_config()
692 i2c_hal_set_tout(&(i2c_context[i2c_num].hal), I2C_SLAVE_TIMEOUT_DEFAULT); in i2c_param_config()
693 i2c_hal_enable_slave_rx_it(&(i2c_context[i2c_num].hal)); in i2c_param_config()
695 i2c_hal_master_init(&(i2c_context[i2c_num].hal), i2c_num); in i2c_param_config()
697 i2c_hal_set_filter(&(i2c_context[i2c_num].hal), I2C_FILTER_CYC_NUM_DEF); in i2c_param_config()
698 i2c_hal_set_bus_timing(&(i2c_context[i2c_num].hal), i2c_conf->master.clk_speed, src_clk); in i2c_param_config()
700 i2c_hal_update_config(&(i2c_context[i2c_num].hal)); in i2c_param_config()
701 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_param_config()
711 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_period()
712 i2c_hal_set_scl_timing(&(i2c_context[i2c_num].hal), high_period, low_period); in i2c_set_period()
713 i2c_hal_update_config(&(i2c_context[i2c_num].hal)); in i2c_set_period()
714 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_period()
721 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_get_period()
722 i2c_hal_get_scl_timing(&(i2c_context[i2c_num].hal), high_period, low_period); in i2c_get_period()
723 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_get_period()
731 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_filter_enable()
732 i2c_hal_set_filter(&(i2c_context[i2c_num].hal), cyc_num); in i2c_filter_enable()
733 i2c_hal_update_config(&(i2c_context[i2c_num].hal)); in i2c_filter_enable()
734 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_filter_enable()
741 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_filter_disable()
742 i2c_hal_set_filter(&(i2c_context[i2c_num].hal), 0); in i2c_filter_disable()
743 i2c_hal_update_config(&(i2c_context[i2c_num].hal)); in i2c_filter_disable()
744 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_filter_disable()
754 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_start_timing()
755 i2c_hal_set_start_timing(&(i2c_context[i2c_num].hal), setup_time, hold_time); in i2c_set_start_timing()
756 i2c_hal_update_config(&(i2c_context[i2c_num].hal)); in i2c_set_start_timing()
757 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_start_timing()
764 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_get_start_timing()
765 i2c_hal_get_start_timing(&(i2c_context[i2c_num].hal), setup_time, hold_time); in i2c_get_start_timing()
766 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_get_start_timing()
776 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_stop_timing()
777 i2c_hal_set_stop_timing(&(i2c_context[i2c_num].hal), setup_time, hold_time); in i2c_set_stop_timing()
778 i2c_hal_update_config(&(i2c_context[i2c_num].hal)); in i2c_set_stop_timing()
779 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_stop_timing()
786 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_get_stop_timing()
787 i2c_hal_get_stop_timing(&(i2c_context[i2c_num].hal), setup_time, hold_time); in i2c_get_stop_timing()
788 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_get_stop_timing()
798 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_data_timing()
799 i2c_hal_set_sda_timing(&(i2c_context[i2c_num].hal), sample_time, hold_time); in i2c_set_data_timing()
800 i2c_hal_update_config(&(i2c_context[i2c_num].hal)); in i2c_set_data_timing()
801 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_data_timing()
808 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_get_data_timing()
809 i2c_hal_get_sda_timing(&(i2c_context[i2c_num].hal), sample_time, hold_time); in i2c_get_data_timing()
810 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_get_data_timing()
819 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_timeout()
820 i2c_hal_set_tout(&(i2c_context[i2c_num].hal), timeout); in i2c_set_timeout()
821 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_set_timeout()
828 i2c_hal_get_tout(&(i2c_context[i2c_num].hal), timeout); in i2c_get_timeout()
893 i2c_context[i2c_num].scl_io_num = scl_io_num; in i2c_set_pin()
894 i2c_context[i2c_num].sda_io_num = sda_io_num; in i2c_set_pin()
1280 … i2c_hal_read_rxfifo(&(i2c_context[i2c_num].hal), cmd->data + cmd->bytes_used, p_i2c->rx_cnt); in i2c_master_cmd_begin_static()
1338 i2c_hal_write_txfifo(&(i2c_context[i2c_num].hal), write_pr, fifo_fill); in i2c_master_cmd_begin_static()
1339 i2c_hal_write_cmd_reg(&(i2c_context[i2c_num].hal), hw_cmd, p_i2c->cmd_idx); in i2c_master_cmd_begin_static()
1340 i2c_hal_write_cmd_reg(&(i2c_context[i2c_num].hal), hw_end_cmd, p_i2c->cmd_idx + 1); in i2c_master_cmd_begin_static()
1341 i2c_hal_enable_master_tx_it(&(i2c_context[i2c_num].hal)); in i2c_master_cmd_begin_static()
1356 i2c_hal_write_cmd_reg(&(i2c_context[i2c_num].hal), hw_cmd, p_i2c->cmd_idx); in i2c_master_cmd_begin_static()
1357 i2c_hal_write_cmd_reg(&(i2c_context[i2c_num].hal), hw_end_cmd, p_i2c->cmd_idx + 1); in i2c_master_cmd_begin_static()
1358 i2c_hal_enable_master_rx_it(&(i2c_context[i2c_num].hal)); in i2c_master_cmd_begin_static()
1362 i2c_hal_write_cmd_reg(&(i2c_context[i2c_num].hal), hw_cmd, p_i2c->cmd_idx); in i2c_master_cmd_begin_static()
1371 i2c_hal_update_config(&(i2c_context[i2c_num].hal)); in i2c_master_cmd_begin_static()
1372 i2c_hal_trans_start(&(i2c_context[i2c_num].hal)); in i2c_master_cmd_begin_static()
1425 || i2c_hal_is_bus_busy(&(i2c_context[i2c_num].hal))) { in i2c_master_cmd_begin()
1446 i2c_hal_disable_intr_mask(&(i2c_context[i2c_num].hal), I2C_LL_INTR_MASK); in i2c_master_cmd_begin()
1447 i2c_hal_clr_intsts_mask(&(i2c_context[i2c_num].hal), I2C_LL_INTR_MASK); in i2c_master_cmd_begin()
1526 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_slave_write_buffer()
1527 i2c_hal_enable_slave_tx_it(&(i2c_context[i2c_num].hal)); in i2c_slave_write_buffer()
1528 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_slave_write_buffer()
1550 I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_slave_read_buffer()
1551 i2c_hal_enable_slave_rx_it(&(i2c_context[i2c_num].hal)); in i2c_slave_read_buffer()
1552 I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); in i2c_slave_read_buffer()