25 #if !CONFIG_FREERTOS_UNICORE
95 //This bitmask has an 1 if the int should be disabled when the flash is disabled.
98 //This bitmask has 1 in it if the int was disabled using esp_intr_noniram_disable.
111         if (vd->cpu > to_insert->cpu) break;  in insert_vector_desc()
112         if (vd->cpu == to_insert->cpu && vd->intno >= to_insert->intno) break;  in insert_vector_desc()
116     if ((vector_desc_head==NULL) || (prev==NULL)) {  in insert_vector_desc()
126 //Returns a vector_desc entry for an intno/cpu, or NULL if none exists.
131         if (vd->cpu==cpu && vd->intno==intno) break;  in find_desc_for_int()
143     if (vd==NULL) {  in get_desc_for_int()
145         if (newvd==NULL) return NULL;  in get_desc_for_int()
161         if ( !(vd->flags & VECDESC_FL_SHARED) ) {  in find_desc_for_source()
162             if ( vd->source == source && cpu == vd->cpu ) break;  in find_desc_for_source()
163         } else if ( vd->cpu == cpu ) {  in find_desc_for_source()
169                 if ( svd->source == source ) {  in find_desc_for_source()
175             if ( found ) break;  in find_desc_for_source()
184     if (intno>31) return ESP_ERR_INVALID_ARG;  in esp_intr_mark_shared()
185     if (cpu>=SOC_CPU_CORES_NUM) return ESP_ERR_INVALID_ARG;  in esp_intr_mark_shared()
189     if (vd==NULL) {  in esp_intr_mark_shared()
194     if (is_int_ram) vd->flags|=VECDESC_FL_INIRAM;  in esp_intr_mark_shared()
202     if (intno>31) return ESP_ERR_INVALID_ARG;  in esp_intr_reserve()
203     if (cpu>=SOC_CPU_CORES_NUM) return ESP_ERR_INVALID_ARG;  in esp_intr_reserve()
207     if (vd==NULL) {  in esp_intr_reserve()
219     //Check if interrupt is not reserved by design  in is_vect_desc_usable()
221     if (interrupt_controller_hal_get_cpu_desc_flags(x, cpu)==INTDESC_RESVD) {  in is_vect_desc_usable()
225     if (interrupt_controller_hal_get_cpu_desc_flags(x, cpu)==INTDESC_SPECIAL && force==-1) {  in is_vect_desc_usable()
231     //Check if the interrupt level is acceptable  in is_vect_desc_usable()
232     if (!(flags&(1<<interrupt_controller_hal_get_level(x)))) {  in is_vect_desc_usable()
236     //check if edge/level type matches what we want  in is_vect_desc_usable()
237     if (((flags&ESP_INTR_FLAG_EDGE) && (interrupt_controller_hal_get_type(x)==INTTP_LEVEL)) ||  in is_vect_desc_usable()
244     //check if interrupt is reserved at runtime  in is_vect_desc_usable()
245     if (vd->flags&VECDESC_FL_RESERVED)  {  in is_vect_desc_usable()
252     //check if interrupt already is in use by a non-shared interrupt  in is_vect_desc_usable()
253     if (vd->flags&VECDESC_FL_NONSHARED) {  in is_vect_desc_usable()
258     if (vd->flags&VECDESC_FL_SHARED ) {  in is_vect_desc_usable()
259         if (flags&ESP_INTR_FLAG_SHARED) {  in is_vect_desc_usable()
262             //Bail out if int is shared, but iram property doesn't match what we want.  in is_vect_desc_usable()
263             if ((vd->flags&VECDESC_FL_SHARED) && (desc_in_iram_flag!=in_iram_flag))  {  in is_vect_desc_usable()
268             //We need an unshared IRQ; can't use shared ones; bail out if this is shared.  in is_vect_desc_usable()
272     } else if (interrupt_controller_hal_has_handler(x, cpu)) {  in is_vect_desc_usable()
273         //Check if interrupt already is allocated by interrupt_controller_hal_set_int_handler  in is_vect_desc_usable()
296     if (!(flags&ESP_INTR_FLAG_LEVELMASK)) flags|=ESP_INTR_FLAG_LOWMED;  in get_available_int()
300     if ( vd ) {  in get_available_int()
301         // if existing vd found, don't need to search any more.  in get_available_int()
303         if ( force != -1 && force != vd->intno ) {  in get_available_int()
305         } else if ( !is_vect_desc_usable(vd, flags, cpu, force) ) {  in get_available_int()
312     if (force!=-1) {  in get_available_int()
314         //if force assigned, don't need to search any more.  in get_available_int()
316         if (vd == NULL ) {  in get_available_int()
317             //if existing vd not found, just check the default state for the intr.  in get_available_int()
321         if ( is_vect_desc_usable(vd, flags, cpu, force) ) {  in get_available_int()
334         if (vd==NULL) {  in get_available_int()
343         if ( !is_vect_desc_usable(vd, flags, cpu, force) ) continue;  in get_available_int()
345         if (flags&ESP_INTR_FLAG_SHARED) {  in get_available_int()
348             //See if int already is used as a shared interrupt.  in get_available_int()
349             if (vd->flags&VECDESC_FL_SHARED) {  in get_available_int()
358                 if (no<bestSharedCt || bestLevel>interrupt_controller_hal_get_level(x)) {  in get_available_int()
368                 if (best==-1) {  in get_available_int()
369 …     //We haven't found a feasible shared interrupt yet. This one is still free and usable, even if  in get_available_int()
372                     if (bestLevel>interrupt_controller_hal_get_level(x)) {  in get_available_int()
383             if (bestLevel>interrupt_controller_hal_get_level(x)) {  in get_available_int()
404         if (!sh_vec->disabled) {  in shared_intr_isr()
405             if ((sh_vec->statusreg == NULL) || (*sh_vec->statusreg & sh_vec->statusmask)) {  in shared_intr_isr()
408                 // check if we will return to scheduler or to interrupted task after ISR  in shared_intr_isr()
409                 if (!os_task_switch_is_pended(cpu_hal_get_core_id())) {  in shared_intr_isr()
419 #if CONFIG_APPTRACE_SV_ENABLE
429     // check if we will return to scheduler or to interrupted task after ISR  in non_shared_intr_isr()
430     if (!os_task_switch_is_pended(cpu_hal_get_core_id())) {  in non_shared_intr_isr()
445     if ((flags&ESP_INTR_FLAG_SHARED) && (flags&ESP_INTR_FLAG_EDGE)) return ESP_ERR_INVALID_ARG;  in esp_intr_alloc_intrstatus()
447     if ((flags&ESP_INTR_FLAG_HIGH) && (handler)) return ESP_ERR_INVALID_ARG;  in esp_intr_alloc_intrstatus()
449     if ((flags&ESP_INTR_FLAG_SHARED) && (!handler || source<0)) return ESP_ERR_INVALID_ARG;  in esp_intr_alloc_intrstatus()
451     if (intrstatusreg && !intrstatusmask) return ESP_ERR_INVALID_ARG;  in esp_intr_alloc_intrstatus()
452     //If the ISR is marked to be IRAM-resident, the handler must not be in the cached region  in esp_intr_alloc_intrstatus()
453     //ToDo: if we are to allow placing interrupt handlers into the 0x400c0000—0x400c2000 region,  in esp_intr_alloc_intrstatus()
456 …if ((flags & ESP_INTR_FLAG_IRAM) && handler && !esp_ptr_in_iram(handler) && !esp_ptr_in_rtc_iram_f…  in esp_intr_alloc_intrstatus()
461     if ((flags&ESP_INTR_FLAG_LEVELMASK)==0) {  in esp_intr_alloc_intrstatus()
462         if (flags&ESP_INTR_FLAG_SHARED) {  in esp_intr_alloc_intrstatus()
472     if (source==ETS_INTERNAL_TIMER0_INTR_SOURCE) force=ETS_INTERNAL_TIMER0_INTR_NO;  in esp_intr_alloc_intrstatus()
473     if (source==ETS_INTERNAL_TIMER1_INTR_SOURCE) force=ETS_INTERNAL_TIMER1_INTR_NO;  in esp_intr_alloc_intrstatus()
474     if (source==ETS_INTERNAL_TIMER2_INTR_SOURCE) force=ETS_INTERNAL_TIMER2_INTR_NO;  in esp_intr_alloc_intrstatus()
475     if (source==ETS_INTERNAL_SW0_INTR_SOURCE) force=ETS_INTERNAL_SW0_INTR_NO;  in esp_intr_alloc_intrstatus()
476     if (source==ETS_INTERNAL_SW1_INTR_SOURCE) force=ETS_INTERNAL_SW1_INTR_NO;  in esp_intr_alloc_intrstatus()
477     if (source==ETS_INTERNAL_PROFILING_INTR_SOURCE) force=ETS_INTERNAL_PROFILING_INTR_NO;  in esp_intr_alloc_intrstatus()
479     //Allocate a return handle. If we end up not needing it, we'll free it later on.  in esp_intr_alloc_intrstatus()
481     if (ret==NULL) return ESP_ERR_NO_MEM;  in esp_intr_alloc_intrstatus()
485     //See if we can find an interrupt that matches the flags.  in esp_intr_alloc_intrstatus()
487     if (intr==-1) {  in esp_intr_alloc_intrstatus()
495     if (vd==NULL) {  in esp_intr_alloc_intrstatus()
502     if (flags&ESP_INTR_FLAG_SHARED) {  in esp_intr_alloc_intrstatus()
505         if (sh_vec==NULL) {  in esp_intr_alloc_intrstatus()
525         if (handler) {  in esp_intr_alloc_intrstatus()
526 #if CONFIG_APPTRACE_SV_ENABLE  in esp_intr_alloc_intrstatus()
528             if (!ns_isr_arg) {  in esp_intr_alloc_intrstatus()
542         if (flags & ESP_INTR_FLAG_EDGE) {  in esp_intr_alloc_intrstatus()
548     if (flags&ESP_INTR_FLAG_IRAM) {  in esp_intr_alloc_intrstatus()
555     if (source>=0) {  in esp_intr_alloc_intrstatus()
566 …//If interrupt has to be started disabled, do that now; ints won't be enabled for real until the e…  in esp_intr_alloc_intrstatus()
568     if (flags&ESP_INTR_FLAG_INTRDISABLED) {  in esp_intr_alloc_intrstatus()
577     if (flags & ESP_INTR_FLAG_EDGE) {  in esp_intr_alloc_intrstatus()
586     //Fill return handle if needed, otherwise free handle.  in esp_intr_alloc_intrstatus()
587     if (ret_handle!=NULL) {  in esp_intr_alloc_intrstatus()
609     if (!handle) return ESP_ERR_INVALID_ARG;  in esp_intr_set_in_iram()
611     if (vd->flags & VECDESC_FL_SHARED) {  in esp_intr_set_in_iram()
616     if (is_in_iram) {  in esp_intr_set_in_iram()
627 #if !CONFIG_FREERTOS_UNICORE
637     if (!handle) return ESP_ERR_INVALID_ARG;  in esp_intr_free()
639 #if !CONFIG_FREERTOS_UNICORE  in esp_intr_free()
641     if (handle->vector_desc->cpu!=cpu_hal_get_core_id()) {  in esp_intr_free()
649     if (handle->vector_desc->flags&VECDESC_FL_SHARED) {  in esp_intr_free()
655             if (svd==handle->shared_vector_desc) {  in esp_intr_free()
657                 if (prevsvd) {  in esp_intr_free()
668         //If nothing left, disable interrupt.  in esp_intr_free()
669         if (handle->vector_desc->shared_vec_info==NULL) free_shared_vector=true;  in esp_intr_free()
673     if ((handle->vector_desc->flags&VECDESC_FL_NONSHARED) || free_shared_vector) {  in esp_intr_free()
675 #if CONFIG_APPTRACE_SV_ENABLE  in esp_intr_free()
676         if (!free_shared_vector) {  in esp_intr_free()
678             if (isr_arg) {  in esp_intr_free()
685 … //Theoretically, we could free the vector_desc... not sure if that's worth the few bytes of memory  in esp_intr_free()
686         //we save.(We can also not use the same exit path for empty shared ints anymore if we delete  in esp_intr_free()
709 …If the source is >=0 (meaning a muxed interrupt), we disable it by muxing the interrupt to a non-c…
710 …interrupt. If the source is <0 (meaning an internal, per-cpu interrupt), we disable it using ESP_I…
720     if (!handle) return ESP_ERR_INVALID_ARG;  in esp_intr_enable()
723     if (handle->shared_vector_desc) {  in esp_intr_enable()
729     if (source >= 0) {  in esp_intr_enable()
734 …if (handle->vector_desc->cpu!=cpu_hal_get_core_id()) return ESP_ERR_INVALID_ARG; //Can only enable…  in esp_intr_enable()
743     if (!handle) return ESP_ERR_INVALID_ARG;  in esp_intr_disable()
747     if (handle->shared_vector_desc) {  in esp_intr_disable()
754             if ( svd->source == source && svd->disabled == 0 ) {  in esp_intr_disable()
764     if (source >= 0) {  in esp_intr_disable()
765         if ( disabled ) {  in esp_intr_disable()
771         if (handle->vector_desc->cpu!=cpu_hal_get_core_id()) {  in esp_intr_disable()
787     if (non_iram_int_disabled_flag[cpu]) {  in esp_intr_noniram_disable()
803     if (!non_iram_int_disabled_flag[cpu]) {  in esp_intr_noniram_enable()