Lines Matching refs:channel
24 void rmt_hal_tx_channel_reset(rmt_hal_context_t *hal, uint32_t channel) in rmt_hal_tx_channel_reset() argument
26 rmt_ll_tx_reset_pointer(hal->regs, channel); in rmt_hal_tx_channel_reset()
27 rmt_ll_enable_tx_err_interrupt(hal->regs, channel, false); in rmt_hal_tx_channel_reset()
28 rmt_ll_enable_tx_end_interrupt(hal->regs, channel, false); in rmt_hal_tx_channel_reset()
29 rmt_ll_enable_tx_thres_interrupt(hal->regs, channel, false); in rmt_hal_tx_channel_reset()
30 rmt_ll_clear_tx_err_interrupt(hal->regs, channel); in rmt_hal_tx_channel_reset()
31 rmt_ll_clear_tx_end_interrupt(hal->regs, channel); in rmt_hal_tx_channel_reset()
32 rmt_ll_clear_tx_thres_interrupt(hal->regs, channel); in rmt_hal_tx_channel_reset()
35 void rmt_hal_rx_channel_reset(rmt_hal_context_t *hal, uint32_t channel) in rmt_hal_rx_channel_reset() argument
37 rmt_ll_rx_reset_pointer(hal->regs, channel); in rmt_hal_rx_channel_reset()
38 rmt_ll_enable_rx_err_interrupt(hal->regs, channel, false); in rmt_hal_rx_channel_reset()
39 rmt_ll_enable_rx_end_interrupt(hal->regs, channel, false); in rmt_hal_rx_channel_reset()
40 rmt_ll_clear_rx_err_interrupt(hal->regs, channel); in rmt_hal_rx_channel_reset()
41 rmt_ll_clear_rx_end_interrupt(hal->regs, channel); in rmt_hal_rx_channel_reset()
44 void rmt_hal_tx_set_counter_clock(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, u… in rmt_hal_tx_set_counter_clock() argument
46 rmt_ll_tx_reset_counter_clock_div(hal->regs, channel); in rmt_hal_tx_set_counter_clock()
48 rmt_ll_tx_set_counter_clock_div(hal->regs, channel, counter_div); in rmt_hal_tx_set_counter_clock()
51 void rmt_hal_set_carrier_clock(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, uint… in rmt_hal_set_carrier_clock() argument
56 rmt_ll_tx_set_carrier_high_low_ticks(hal->regs, channel, div_high, div_low); in rmt_hal_set_carrier_clock()
59 void rmt_hal_set_rx_filter_thres(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, ui… in rmt_hal_set_rx_filter_thres() argument
62 rmt_ll_rx_set_filter_thres(hal->regs, channel, thres); in rmt_hal_set_rx_filter_thres()
65 void rmt_hal_set_rx_idle_thres(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, uint… in rmt_hal_set_rx_idle_thres() argument
68 rmt_ll_rx_set_idle_thres(hal->regs, channel, thres); in rmt_hal_set_rx_idle_thres()
71 uint32_t rmt_hal_receive(rmt_hal_context_t *hal, uint32_t channel, rmt_item32_t *buf) in rmt_hal_receive() argument
74 rmt_ll_rx_set_mem_owner(hal->regs, channel, RMT_MEM_OWNER_SW); in rmt_hal_receive()
76 buf[len].val = hal->mem->chan[channel].data32[len].val; in rmt_hal_receive()
84 rmt_ll_rx_set_mem_owner(hal->regs, channel, RMT_MEM_OWNER_HW); in rmt_hal_receive()
85 rmt_ll_rx_reset_pointer(hal->regs, channel); in rmt_hal_receive()