Lines Matching refs:RoReg
129 #define REG_GMAC_NSR (*(RoReg*)0x40034008U) /**< \brief (GMAC) Network Status Register */
136 #define REG_GMAC_ISR (*(RoReg*)0x40034024U) /**< \brief (GMAC) Interrupt Status Register */
139 #define REG_GMAC_IMR (*(RoReg*)0x40034030U) /**< \brief (GMAC) Interrupt Mask Register */
141 #define REG_GMAC_RPQ (*(RoReg*)0x40034038U) /**< \brief (GMAC) Received Pause Quantum Registe…
159 #define REG_GMAC_OTLO (*(RoReg*)0x40034100U) /**< \brief (GMAC) Octets Transmitted [31:0] Regi…
160 #define REG_GMAC_OTHI (*(RoReg*)0x40034104U) /**< \brief (GMAC) Octets Transmitted [47:32] Reg…
161 #define REG_GMAC_FT (*(RoReg*)0x40034108U) /**< \brief (GMAC) Frames Transmitted Register */
162 #define REG_GMAC_BCFT (*(RoReg*)0x4003410CU) /**< \brief (GMAC) Broadcast Frames Transmitted R…
163 #define REG_GMAC_MFT (*(RoReg*)0x40034110U) /**< \brief (GMAC) Multicast Frames Transmitted R…
164 #define REG_GMAC_PFT (*(RoReg*)0x40034114U) /**< \brief (GMAC) Pause Frames Transmitted Regis…
165 #define REG_GMAC_BFT64 (*(RoReg*)0x40034118U) /**< \brief (GMAC) 64 Byte Frames Transmitted Reg…
166 #define REG_GMAC_TBFT127 (*(RoReg*)0x4003411CU) /**< \brief (GMAC) 65 to 127 Byte Frames Transmit…
167 #define REG_GMAC_TBFT255 (*(RoReg*)0x40034120U) /**< \brief (GMAC) 128 to 255 Byte Frames Transmi…
168 #define REG_GMAC_TBFT511 (*(RoReg*)0x40034124U) /**< \brief (GMAC) 256 to 511 Byte Frames Transmi…
169 #define REG_GMAC_TBFT1023 (*(RoReg*)0x40034128U) /**< \brief (GMAC) 512 to 1023 Byte Frames Transm…
170 #define REG_GMAC_TBFT1518 (*(RoReg*)0x4003412CU) /**< \brief (GMAC) 1024 to 1518 Byte Frames Trans…
171 #define REG_GMAC_GTBFT1518 (*(RoReg*)0x40034130U) /**< \brief (GMAC) Greater Than 1518 Byte Frames …
172 #define REG_GMAC_TUR (*(RoReg*)0x40034134U) /**< \brief (GMAC) Transmit Under Runs Register */
173 #define REG_GMAC_SCF (*(RoReg*)0x40034138U) /**< \brief (GMAC) Single Collision Frames Regist…
174 #define REG_GMAC_MCF (*(RoReg*)0x4003413CU) /**< \brief (GMAC) Multiple Collision Frames Regi…
175 #define REG_GMAC_EC (*(RoReg*)0x40034140U) /**< \brief (GMAC) Excessive Collisions Register …
176 #define REG_GMAC_LC (*(RoReg*)0x40034144U) /**< \brief (GMAC) Late Collisions Register */
177 #define REG_GMAC_DTF (*(RoReg*)0x40034148U) /**< \brief (GMAC) Deferred Transmission Frames R…
178 #define REG_GMAC_CSE (*(RoReg*)0x4003414CU) /**< \brief (GMAC) Carrier Sense Errors Register …
179 #define REG_GMAC_ORLO (*(RoReg*)0x40034150U) /**< \brief (GMAC) Octets Received [31:0] Receive…
180 #define REG_GMAC_ORHI (*(RoReg*)0x40034154U) /**< \brief (GMAC) Octets Received [47:32] Receiv…
181 #define REG_GMAC_FR (*(RoReg*)0x40034158U) /**< \brief (GMAC) Frames Received Register */
182 #define REG_GMAC_BCFR (*(RoReg*)0x4003415CU) /**< \brief (GMAC) Broadcast Frames Received Regi…
183 #define REG_GMAC_MFR (*(RoReg*)0x40034160U) /**< \brief (GMAC) Multicast Frames Received Regi…
184 #define REG_GMAC_PFR (*(RoReg*)0x40034164U) /**< \brief (GMAC) Pause Frames Received Register…
185 #define REG_GMAC_BFR64 (*(RoReg*)0x40034168U) /**< \brief (GMAC) 64 Byte Frames Received Regist…
186 #define REG_GMAC_TBFR127 (*(RoReg*)0x4003416CU) /**< \brief (GMAC) 65 to 127 Byte Frames Received…
187 #define REG_GMAC_TBFR255 (*(RoReg*)0x40034170U) /**< \brief (GMAC) 128 to 255 Byte Frames Receive…
188 #define REG_GMAC_TBFR511 (*(RoReg*)0x40034174U) /**< \brief (GMAC) 256 to 511Byte Frames Received…
189 #define REG_GMAC_TBFR1023 (*(RoReg*)0x40034178U) /**< \brief (GMAC) 512 to 1023 Byte Frames Receiv…
190 #define REG_GMAC_TBFR1518 (*(RoReg*)0x4003417CU) /**< \brief (GMAC) 1024 to 1518 Byte Frames Recei…
191 #define REG_GMAC_TMXBFR (*(RoReg*)0x40034180U) /**< \brief (GMAC) 1519 to Maximum Byte Frames Re…
192 #define REG_GMAC_UFR (*(RoReg*)0x40034184U) /**< \brief (GMAC) Undersize Frames Received Regi…
193 #define REG_GMAC_OFR (*(RoReg*)0x40034188U) /**< \brief (GMAC) Oversize Frames Received Regis…
194 #define REG_GMAC_JR (*(RoReg*)0x4003418CU) /**< \brief (GMAC) Jabbers Received Register */
195 #define REG_GMAC_FCSE (*(RoReg*)0x40034190U) /**< \brief (GMAC) Frame Check Sequence Errors Re…
196 #define REG_GMAC_LFFE (*(RoReg*)0x40034194U) /**< \brief (GMAC) Length Field Frame Errors Regi…
197 #define REG_GMAC_RSE (*(RoReg*)0x40034198U) /**< \brief (GMAC) Receive Symbol Errors Register…
198 #define REG_GMAC_AE (*(RoReg*)0x4003419CU) /**< \brief (GMAC) Alignment Errors Register */
199 #define REG_GMAC_RRE (*(RoReg*)0x400341A0U) /**< \brief (GMAC) Receive Resource Errors Regist…
200 #define REG_GMAC_ROE (*(RoReg*)0x400341A4U) /**< \brief (GMAC) Receive Overrun Register */
201 #define REG_GMAC_IHCE (*(RoReg*)0x400341A8U) /**< \brief (GMAC) IP Header Checksum Errors Regi…
202 #define REG_GMAC_TCE (*(RoReg*)0x400341ACU) /**< \brief (GMAC) TCP Checksum Errors Register */
203 #define REG_GMAC_UCE (*(RoReg*)0x400341B0U) /**< \brief (GMAC) UDP Checksum Errors Register */
210 #define REG_GMAC_EFTS (*(RoReg*)0x400341E0U) /**< \brief (GMAC) PTP Event Frame Transmitted Se…
211 #define REG_GMAC_EFTN (*(RoReg*)0x400341E4U) /**< \brief (GMAC) PTP Event Frame Transmitted Na…
212 #define REG_GMAC_EFRS (*(RoReg*)0x400341E8U) /**< \brief (GMAC) PTP Event Frame Received Secon…
213 #define REG_GMAC_EFRN (*(RoReg*)0x400341ECU) /**< \brief (GMAC) PTP Event Frame Received Nanos…
214 #define REG_GMAC_PEFTS (*(RoReg*)0x400341F0U) /**< \brief (GMAC) PTP Peer Event Frame Transmitt…
215 #define REG_GMAC_PEFTN (*(RoReg*)0x400341F4U) /**< \brief (GMAC) PTP Peer Event Frame Transmitt…
216 #define REG_GMAC_PEFRS (*(RoReg*)0x400341F8U) /**< \brief (GMAC) PTP Peer Event Frame Received …
217 #define REG_GMAC_PEFRN (*(RoReg*)0x400341FCU) /**< \brief (GMAC) PTP Peer Event Frame Received …