Lines Matching full:on
21 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
232 #define PIN_PA30H_CM4_SWCLK _L_(30) /**< \brief CM4 signal: SWCLK on PA30 mux H */
236 #define PIN_PC27M_CM4_SWO _L_(91) /**< \brief CM4 signal: SWO on PC27 mux M */
240 #define PIN_PB30H_CM4_SWO _L_(62) /**< \brief CM4 signal: SWO on PB30 mux H */
244 #define PIN_PC27H_CM4_TRACECLK _L_(91) /**< \brief CM4 signal: TRACECLK on PC27 mux H */
248 #define PIN_PC28H_CM4_TRACEDATA0 _L_(92) /**< \brief CM4 signal: TRACEDATA0 on PC28 mux H */
252 #define PIN_PC26H_CM4_TRACEDATA1 _L_(90) /**< \brief CM4 signal: TRACEDATA1 on PC26 mux H */
256 #define PIN_PC25H_CM4_TRACEDATA2 _L_(89) /**< \brief CM4 signal: TRACEDATA2 on PC25 mux H */
260 #define PIN_PC24H_CM4_TRACEDATA3 _L_(88) /**< \brief CM4 signal: TRACEDATA3 on PC24 mux H */
265 #define PIN_PA03B_ANAREF_VREF0 _L_(3) /**< \brief ANAREF signal: VREF0 on PA03 mux B */
269 #define PIN_PA04B_ANAREF_VREF1 _L_(4) /**< \brief ANAREF signal: VREF1 on PA04 mux B */
273 #define PIN_PA06B_ANAREF_VREF2 _L_(6) /**< \brief ANAREF signal: VREF2 on PA06 mux B */
278 #define PIN_PA30M_GCLK_IO0 _L_(30) /**< \brief GCLK signal: IO0 on PA30 mux M */
282 #define PIN_PB14M_GCLK_IO0 _L_(46) /**< \brief GCLK signal: IO0 on PB14 mux M */
286 #define PIN_PA14M_GCLK_IO0 _L_(14) /**< \brief GCLK signal: IO0 on PA14 mux M */
290 #define PIN_PB22M_GCLK_IO0 _L_(54) /**< \brief GCLK signal: IO0 on PB22 mux M */
294 #define PIN_PB15M_GCLK_IO1 _L_(47) /**< \brief GCLK signal: IO1 on PB15 mux M */
298 #define PIN_PA15M_GCLK_IO1 _L_(15) /**< \brief GCLK signal: IO1 on PA15 mux M */
302 #define PIN_PB23M_GCLK_IO1 _L_(55) /**< \brief GCLK signal: IO1 on PB23 mux M */
306 #define PIN_PA27M_GCLK_IO1 _L_(27) /**< \brief GCLK signal: IO1 on PA27 mux M */
310 #define PIN_PA16M_GCLK_IO2 _L_(16) /**< \brief GCLK signal: IO2 on PA16 mux M */
314 #define PIN_PB16M_GCLK_IO2 _L_(48) /**< \brief GCLK signal: IO2 on PB16 mux M */
318 #define PIN_PA17M_GCLK_IO3 _L_(17) /**< \brief GCLK signal: IO3 on PA17 mux M */
322 #define PIN_PB17M_GCLK_IO3 _L_(49) /**< \brief GCLK signal: IO3 on PB17 mux M */
326 #define PIN_PA10M_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux M */
330 #define PIN_PB10M_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux M */
334 #define PIN_PB18M_GCLK_IO4 _L_(50) /**< \brief GCLK signal: IO4 on PB18 mux M */
338 #define PIN_PA11M_GCLK_IO5 _L_(11) /**< \brief GCLK signal: IO5 on PA11 mux M */
342 #define PIN_PB11M_GCLK_IO5 _L_(43) /**< \brief GCLK signal: IO5 on PB11 mux M */
346 #define PIN_PB19M_GCLK_IO5 _L_(51) /**< \brief GCLK signal: IO5 on PB19 mux M */
350 #define PIN_PB12M_GCLK_IO6 _L_(44) /**< \brief GCLK signal: IO6 on PB12 mux M */
354 #define PIN_PB20M_GCLK_IO6 _L_(52) /**< \brief GCLK signal: IO6 on PB20 mux M */
358 #define PIN_PB13M_GCLK_IO7 _L_(45) /**< \brief GCLK signal: IO7 on PB13 mux M */
362 #define PIN_PB21M_GCLK_IO7 _L_(53) /**< \brief GCLK signal: IO7 on PB21 mux M */
367 #define PIN_PA00A_EIC_EXTINT0 _L_(0) /**< \brief EIC signal: EXTINT0 on PA00 mux A */
372 #define PIN_PA16A_EIC_EXTINT0 _L_(16) /**< \brief EIC signal: EXTINT0 on PA16 mux A */
377 #define PIN_PB00A_EIC_EXTINT0 _L_(32) /**< \brief EIC signal: EXTINT0 on PB00 mux A */
382 #define PIN_PB16A_EIC_EXTINT0 _L_(48) /**< \brief EIC signal: EXTINT0 on PB16 mux A */
387 #define PIN_PC00A_EIC_EXTINT0 _L_(64) /**< \brief EIC signal: EXTINT0 on PC00 mux A */
392 #define PIN_PC16A_EIC_EXTINT0 _L_(80) /**< \brief EIC signal: EXTINT0 on PC16 mux A */
397 #define PIN_PD00A_EIC_EXTINT0 _L_(96) /**< \brief EIC signal: EXTINT0 on PD00 mux A */
402 #define PIN_PA01A_EIC_EXTINT1 _L_(1) /**< \brief EIC signal: EXTINT1 on PA01 mux A */
407 #define PIN_PA17A_EIC_EXTINT1 _L_(17) /**< \brief EIC signal: EXTINT1 on PA17 mux A */
412 #define PIN_PB01A_EIC_EXTINT1 _L_(33) /**< \brief EIC signal: EXTINT1 on PB01 mux A */
417 #define PIN_PB17A_EIC_EXTINT1 _L_(49) /**< \brief EIC signal: EXTINT1 on PB17 mux A */
422 #define PIN_PC01A_EIC_EXTINT1 _L_(65) /**< \brief EIC signal: EXTINT1 on PC01 mux A */
427 #define PIN_PC17A_EIC_EXTINT1 _L_(81) /**< \brief EIC signal: EXTINT1 on PC17 mux A */
432 #define PIN_PD01A_EIC_EXTINT1 _L_(97) /**< \brief EIC signal: EXTINT1 on PD01 mux A */
437 #define PIN_PA02A_EIC_EXTINT2 _L_(2) /**< \brief EIC signal: EXTINT2 on PA02 mux A */
442 #define PIN_PA18A_EIC_EXTINT2 _L_(18) /**< \brief EIC signal: EXTINT2 on PA18 mux A */
447 #define PIN_PB02A_EIC_EXTINT2 _L_(34) /**< \brief EIC signal: EXTINT2 on PB02 mux A */
452 #define PIN_PB18A_EIC_EXTINT2 _L_(50) /**< \brief EIC signal: EXTINT2 on PB18 mux A */
457 #define PIN_PC02A_EIC_EXTINT2 _L_(66) /**< \brief EIC signal: EXTINT2 on PC02 mux A */
462 #define PIN_PC18A_EIC_EXTINT2 _L_(82) /**< \brief EIC signal: EXTINT2 on PC18 mux A */
467 #define PIN_PA03A_EIC_EXTINT3 _L_(3) /**< \brief EIC signal: EXTINT3 on PA03 mux A */
472 #define PIN_PA19A_EIC_EXTINT3 _L_(19) /**< \brief EIC signal: EXTINT3 on PA19 mux A */
477 #define PIN_PB03A_EIC_EXTINT3 _L_(35) /**< \brief EIC signal: EXTINT3 on PB03 mux A */
482 #define PIN_PB19A_EIC_EXTINT3 _L_(51) /**< \brief EIC signal: EXTINT3 on PB19 mux A */
487 #define PIN_PC03A_EIC_EXTINT3 _L_(67) /**< \brief EIC signal: EXTINT3 on PC03 mux A */
492 #define PIN_PC19A_EIC_EXTINT3 _L_(83) /**< \brief EIC signal: EXTINT3 on PC19 mux A */
497 #define PIN_PD08A_EIC_EXTINT3 _L_(104) /**< \brief EIC signal: EXTINT3 on PD08 mux A */
502 #define PIN_PA04A_EIC_EXTINT4 _L_(4) /**< \brief EIC signal: EXTINT4 on PA04 mux A */
507 #define PIN_PA20A_EIC_EXTINT4 _L_(20) /**< \brief EIC signal: EXTINT4 on PA20 mux A */
512 #define PIN_PB04A_EIC_EXTINT4 _L_(36) /**< \brief EIC signal: EXTINT4 on PB04 mux A */
517 #define PIN_PB20A_EIC_EXTINT4 _L_(52) /**< \brief EIC signal: EXTINT4 on PB20 mux A */
522 #define PIN_PC04A_EIC_EXTINT4 _L_(68) /**< \brief EIC signal: EXTINT4 on PC04 mux A */
527 #define PIN_PC20A_EIC_EXTINT4 _L_(84) /**< \brief EIC signal: EXTINT4 on PC20 mux A */
532 #define PIN_PD09A_EIC_EXTINT4 _L_(105) /**< \brief EIC signal: EXTINT4 on PD09 mux A */
537 #define PIN_PA05A_EIC_EXTINT5 _L_(5) /**< \brief EIC signal: EXTINT5 on PA05 mux A */
542 #define PIN_PA21A_EIC_EXTINT5 _L_(21) /**< \brief EIC signal: EXTINT5 on PA21 mux A */
547 #define PIN_PB05A_EIC_EXTINT5 _L_(37) /**< \brief EIC signal: EXTINT5 on PB05 mux A */
552 #define PIN_PB21A_EIC_EXTINT5 _L_(53) /**< \brief EIC signal: EXTINT5 on PB21 mux A */
557 #define PIN_PC05A_EIC_EXTINT5 _L_(69) /**< \brief EIC signal: EXTINT5 on PC05 mux A */
562 #define PIN_PC21A_EIC_EXTINT5 _L_(85) /**< \brief EIC signal: EXTINT5 on PC21 mux A */
567 #define PIN_PD10A_EIC_EXTINT5 _L_(106) /**< \brief EIC signal: EXTINT5 on PD10 mux A */
572 #define PIN_PA06A_EIC_EXTINT6 _L_(6) /**< \brief EIC signal: EXTINT6 on PA06 mux A */
577 #define PIN_PA22A_EIC_EXTINT6 _L_(22) /**< \brief EIC signal: EXTINT6 on PA22 mux A */
582 #define PIN_PB06A_EIC_EXTINT6 _L_(38) /**< \brief EIC signal: EXTINT6 on PB06 mux A */
587 #define PIN_PB22A_EIC_EXTINT6 _L_(54) /**< \brief EIC signal: EXTINT6 on PB22 mux A */
592 #define PIN_PC06A_EIC_EXTINT6 _L_(70) /**< \brief EIC signal: EXTINT6 on PC06 mux A */
597 #define PIN_PC22A_EIC_EXTINT6 _L_(86) /**< \brief EIC signal: EXTINT6 on PC22 mux A */
602 #define PIN_PD11A_EIC_EXTINT6 _L_(107) /**< \brief EIC signal: EXTINT6 on PD11 mux A */
607 #define PIN_PA07A_EIC_EXTINT7 _L_(7) /**< \brief EIC signal: EXTINT7 on PA07 mux A */
612 #define PIN_PA23A_EIC_EXTINT7 _L_(23) /**< \brief EIC signal: EXTINT7 on PA23 mux A */
617 #define PIN_PB07A_EIC_EXTINT7 _L_(39) /**< \brief EIC signal: EXTINT7 on PB07 mux A */
622 #define PIN_PB23A_EIC_EXTINT7 _L_(55) /**< \brief EIC signal: EXTINT7 on PB23 mux A */
627 #define PIN_PC23A_EIC_EXTINT7 _L_(87) /**< \brief EIC signal: EXTINT7 on PC23 mux A */
632 #define PIN_PD12A_EIC_EXTINT7 _L_(108) /**< \brief EIC signal: EXTINT7 on PD12 mux A */
637 #define PIN_PA24A_EIC_EXTINT8 _L_(24) /**< \brief EIC signal: EXTINT8 on PA24 mux A */
642 #define PIN_PB08A_EIC_EXTINT8 _L_(40) /**< \brief EIC signal: EXTINT8 on PB08 mux A */
647 #define PIN_PB24A_EIC_EXTINT8 _L_(56) /**< \brief EIC signal: EXTINT8 on PB24 mux A */
652 #define PIN_PC24A_EIC_EXTINT8 _L_(88) /**< \brief EIC signal: EXTINT8 on PC24 mux A */
657 #define PIN_PA09A_EIC_EXTINT9 _L_(9) /**< \brief EIC signal: EXTINT9 on PA09 mux A */
662 #define PIN_PA25A_EIC_EXTINT9 _L_(25) /**< \brief EIC signal: EXTINT9 on PA25 mux A */
667 #define PIN_PB09A_EIC_EXTINT9 _L_(41) /**< \brief EIC signal: EXTINT9 on PB09 mux A */
672 #define PIN_PB25A_EIC_EXTINT9 _L_(57) /**< \brief EIC signal: EXTINT9 on PB25 mux A */
677 #define PIN_PC07A_EIC_EXTINT9 _L_(71) /**< \brief EIC signal: EXTINT9 on PC07 mux A */
682 #define PIN_PC25A_EIC_EXTINT9 _L_(89) /**< \brief EIC signal: EXTINT9 on PC25 mux A */
687 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
692 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
697 #define PIN_PC10A_EIC_EXTINT10 _L_(74) /**< \brief EIC signal: EXTINT10 on PC10 mux A */
702 #define PIN_PC26A_EIC_EXTINT10 _L_(90) /**< \brief EIC signal: EXTINT10 on PC26 mux A */
707 #define PIN_PD20A_EIC_EXTINT10 _L_(116) /**< \brief EIC signal: EXTINT10 on PD20 mux A */
712 #define PIN_PA11A_EIC_EXTINT11 _L_(11) /**< \brief EIC signal: EXTINT11 on PA11 mux A */
717 #define PIN_PA27A_EIC_EXTINT11 _L_(27) /**< \brief EIC signal: EXTINT11 on PA27 mux A */
722 #define PIN_PB11A_EIC_EXTINT11 _L_(43) /**< \brief EIC signal: EXTINT11 on PB11 mux A */
727 #define PIN_PC11A_EIC_EXTINT11 _L_(75) /**< \brief EIC signal: EXTINT11 on PC11 mux A */
732 #define PIN_PC27A_EIC_EXTINT11 _L_(91) /**< \brief EIC signal: EXTINT11 on PC27 mux A */
737 #define PIN_PD21A_EIC_EXTINT11 _L_(117) /**< \brief EIC signal: EXTINT11 on PD21 mux A */
742 #define PIN_PA12A_EIC_EXTINT12 _L_(12) /**< \brief EIC signal: EXTINT12 on PA12 mux A */
747 #define PIN_PB12A_EIC_EXTINT12 _L_(44) /**< \brief EIC signal: EXTINT12 on PB12 mux A */
752 #define PIN_PB26A_EIC_EXTINT12 _L_(58) /**< \brief EIC signal: EXTINT12 on PB26 mux A */
757 #define PIN_PC12A_EIC_EXTINT12 _L_(76) /**< \brief EIC signal: EXTINT12 on PC12 mux A */
762 #define PIN_PC28A_EIC_EXTINT12 _L_(92) /**< \brief EIC signal: EXTINT12 on PC28 mux A */
767 #define PIN_PA13A_EIC_EXTINT13 _L_(13) /**< \brief EIC signal: EXTINT13 on PA13 mux A */
772 #define PIN_PB13A_EIC_EXTINT13 _L_(45) /**< \brief EIC signal: EXTINT13 on PB13 mux A */
777 #define PIN_PB27A_EIC_EXTINT13 _L_(59) /**< \brief EIC signal: EXTINT13 on PB27 mux A */
782 #define PIN_PC13A_EIC_EXTINT13 _L_(77) /**< \brief EIC signal: EXTINT13 on PC13 mux A */
787 #define PIN_PA30A_EIC_EXTINT14 _L_(30) /**< \brief EIC signal: EXTINT14 on PA30 mux A */
792 #define PIN_PB14A_EIC_EXTINT14 _L_(46) /**< \brief EIC signal: EXTINT14 on PB14 mux A */
797 #define PIN_PB28A_EIC_EXTINT14 _L_(60) /**< \brief EIC signal: EXTINT14 on PB28 mux A */
802 #define PIN_PB30A_EIC_EXTINT14 _L_(62) /**< \brief EIC signal: EXTINT14 on PB30 mux A */
807 #define PIN_PC14A_EIC_EXTINT14 _L_(78) /**< \brief EIC signal: EXTINT14 on PC14 mux A */
812 #define PIN_PC30A_EIC_EXTINT14 _L_(94) /**< \brief EIC signal: EXTINT14 on PC30 mux A */
817 #define PIN_PA14A_EIC_EXTINT14 _L_(14) /**< \brief EIC signal: EXTINT14 on PA14 mux A */
822 #define PIN_PA15A_EIC_EXTINT15 _L_(15) /**< \brief EIC signal: EXTINT15 on PA15 mux A */
827 #define PIN_PA31A_EIC_EXTINT15 _L_(31) /**< \brief EIC signal: EXTINT15 on PA31 mux A */
832 #define PIN_PB15A_EIC_EXTINT15 _L_(47) /**< \brief EIC signal: EXTINT15 on PB15 mux A */
837 #define PIN_PB29A_EIC_EXTINT15 _L_(61) /**< \brief EIC signal: EXTINT15 on PB29 mux A */
842 #define PIN_PB31A_EIC_EXTINT15 _L_(63) /**< \brief EIC signal: EXTINT15 on PB31 mux A */
847 #define PIN_PC15A_EIC_EXTINT15 _L_(79) /**< \brief EIC signal: EXTINT15 on PC15 mux A */
852 #define PIN_PC31A_EIC_EXTINT15 _L_(95) /**< \brief EIC signal: EXTINT15 on PC31 mux A */
857 #define PIN_PA08A_EIC_NMI _L_(8) /**< \brief EIC signal: NMI on PA08 mux A */
862 #define PIN_PA04D_SERCOM0_PAD0 _L_(4) /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
866 #define PIN_PC17D_SERCOM0_PAD0 _L_(81) /**< \brief SERCOM0 signal: PAD0 on PC17 mux D */
870 #define PIN_PA08C_SERCOM0_PAD0 _L_(8) /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
874 #define PIN_PB24C_SERCOM0_PAD0 _L_(56) /**< \brief SERCOM0 signal: PAD0 on PB24 mux C */
878 #define PIN_PA05D_SERCOM0_PAD1 _L_(5) /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
882 #define PIN_PC16D_SERCOM0_PAD1 _L_(80) /**< \brief SERCOM0 signal: PAD1 on PC16 mux D */
886 #define PIN_PA09C_SERCOM0_PAD1 _L_(9) /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
890 #define PIN_PB25C_SERCOM0_PAD1 _L_(57) /**< \brief SERCOM0 signal: PAD1 on PB25 mux C */
894 #define PIN_PA06D_SERCOM0_PAD2 _L_(6) /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
898 #define PIN_PC18D_SERCOM0_PAD2 _L_(82) /**< \brief SERCOM0 signal: PAD2 on PC18 mux D */
902 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
906 #define PIN_PC24C_SERCOM0_PAD2 _L_(88) /**< \brief SERCOM0 signal: PAD2 on PC24 mux C */
910 #define PIN_PA07D_SERCOM0_PAD3 _L_(7) /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
914 #define PIN_PC19D_SERCOM0_PAD3 _L_(83) /**< \brief SERCOM0 signal: PAD3 on PC19 mux D */
918 #define PIN_PA11C_SERCOM0_PAD3 _L_(11) /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
922 #define PIN_PC25C_SERCOM0_PAD3 _L_(89) /**< \brief SERCOM0 signal: PAD3 on PC25 mux C */
927 #define PIN_PA00D_SERCOM1_PAD0 _L_(0) /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
931 #define PIN_PA16C_SERCOM1_PAD0 _L_(16) /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
935 #define PIN_PC22C_SERCOM1_PAD0 _L_(86) /**< \brief SERCOM1 signal: PAD0 on PC22 mux C */
939 #define PIN_PC27C_SERCOM1_PAD0 _L_(91) /**< \brief SERCOM1 signal: PAD0 on PC27 mux C */
943 #define PIN_PA01D_SERCOM1_PAD1 _L_(1) /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
947 #define PIN_PA17C_SERCOM1_PAD1 _L_(17) /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
951 #define PIN_PC23C_SERCOM1_PAD1 _L_(87) /**< \brief SERCOM1 signal: PAD1 on PC23 mux C */
955 #define PIN_PC28C_SERCOM1_PAD1 _L_(92) /**< \brief SERCOM1 signal: PAD1 on PC28 mux C */
959 #define PIN_PA30D_SERCOM1_PAD2 _L_(30) /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
963 #define PIN_PA18C_SERCOM1_PAD2 _L_(18) /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
967 #define PIN_PB22C_SERCOM1_PAD2 _L_(54) /**< \brief SERCOM1 signal: PAD2 on PB22 mux C */
971 #define PIN_PD20C_SERCOM1_PAD2 _L_(116) /**< \brief SERCOM1 signal: PAD2 on PD20 mux C */
975 #define PIN_PA31D_SERCOM1_PAD3 _L_(31) /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
979 #define PIN_PA19C_SERCOM1_PAD3 _L_(19) /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
983 #define PIN_PB23C_SERCOM1_PAD3 _L_(55) /**< \brief SERCOM1 signal: PAD3 on PB23 mux C */
987 #define PIN_PD21C_SERCOM1_PAD3 _L_(117) /**< \brief SERCOM1 signal: PAD3 on PD21 mux C */
992 #define PIN_PA04E_TC0_WO0 _L_(4) /**< \brief TC0 signal: WO0 on PA04 mux E */
996 #define PIN_PA08E_TC0_WO0 _L_(8) /**< \brief TC0 signal: WO0 on PA08 mux E */
1000 #define PIN_PB30E_TC0_WO0 _L_(62) /**< \brief TC0 signal: WO0 on PB30 mux E */
1004 #define PIN_PA05E_TC0_WO1 _L_(5) /**< \brief TC0 signal: WO1 on PA05 mux E */
1008 #define PIN_PA09E_TC0_WO1 _L_(9) /**< \brief TC0 signal: WO1 on PA09 mux E */
1012 #define PIN_PB31E_TC0_WO1 _L_(63) /**< \brief TC0 signal: WO1 on PB31 mux E */
1017 #define PIN_PA06E_TC1_WO0 _L_(6) /**< \brief TC1 signal: WO0 on PA06 mux E */
1021 #define PIN_PA10E_TC1_WO0 _L_(10) /**< \brief TC1 signal: WO0 on PA10 mux E */
1025 #define PIN_PA07E_TC1_WO1 _L_(7) /**< \brief TC1 signal: WO1 on PA07 mux E */
1029 #define PIN_PA11E_TC1_WO1 _L_(11) /**< \brief TC1 signal: WO1 on PA11 mux E */
1034 #define PIN_PA24H_USB_DM _L_(24) /**< \brief USB signal: DM on PA24 mux H */
1038 #define PIN_PA25H_USB_DP _L_(25) /**< \brief USB signal: DP on PA25 mux H */
1042 #define PIN_PA23H_USB_SOF_1KHZ _L_(23) /**< \brief USB signal: SOF_1KHZ on PA23 mux H */
1046 #define PIN_PB22H_USB_SOF_1KHZ _L_(54) /**< \brief USB signal: SOF_1KHZ on PB22 mux H */
1051 #define PIN_PA09D_SERCOM2_PAD0 _L_(9) /**< \brief SERCOM2 signal: PAD0 on PA09 mux D */
1055 #define PIN_PB25D_SERCOM2_PAD0 _L_(57) /**< \brief SERCOM2 signal: PAD0 on PB25 mux D */
1059 #define PIN_PA12C_SERCOM2_PAD0 _L_(12) /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */
1063 #define PIN_PB26C_SERCOM2_PAD0 _L_(58) /**< \brief SERCOM2 signal: PAD0 on PB26 mux C */
1067 #define PIN_PA08D_SERCOM2_PAD1 _L_(8) /**< \brief SERCOM2 signal: PAD1 on PA08 mux D */
1071 #define PIN_PB24D_SERCOM2_PAD1 _L_(56) /**< \brief SERCOM2 signal: PAD1 on PB24 mux D */
1075 #define PIN_PA13C_SERCOM2_PAD1 _L_(13) /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */
1079 #define PIN_PB27C_SERCOM2_PAD1 _L_(59) /**< \brief SERCOM2 signal: PAD1 on PB27 mux C */
1083 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
1087 #define PIN_PC24D_SERCOM2_PAD2 _L_(88) /**< \brief SERCOM2 signal: PAD2 on PC24 mux D */
1091 #define PIN_PB28C_SERCOM2_PAD2 _L_(60) /**< \brief SERCOM2 signal: PAD2 on PB28 mux C */
1095 #define PIN_PA14C_SERCOM2_PAD2 _L_(14) /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
1099 #define PIN_PA11D_SERCOM2_PAD3 _L_(11) /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
1103 #define PIN_PC25D_SERCOM2_PAD3 _L_(89) /**< \brief SERCOM2 signal: PAD3 on PC25 mux D */
1107 #define PIN_PB29C_SERCOM2_PAD3 _L_(61) /**< \brief SERCOM2 signal: PAD3 on PB29 mux C */
1111 #define PIN_PA15C_SERCOM2_PAD3 _L_(15) /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
1116 #define PIN_PA17D_SERCOM3_PAD0 _L_(17) /**< \brief SERCOM3 signal: PAD0 on PA17 mux D */
1120 #define PIN_PC23D_SERCOM3_PAD0 _L_(87) /**< \brief SERCOM3 signal: PAD0 on PC23 mux D */
1124 #define PIN_PA22C_SERCOM3_PAD0 _L_(22) /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
1128 #define PIN_PB20C_SERCOM3_PAD0 _L_(52) /**< \brief SERCOM3 signal: PAD0 on PB20 mux C */
1132 #define PIN_PA16D_SERCOM3_PAD1 _L_(16) /**< \brief SERCOM3 signal: PAD1 on PA16 mux D */
1136 #define PIN_PC22D_SERCOM3_PAD1 _L_(86) /**< \brief SERCOM3 signal: PAD1 on PC22 mux D */
1140 #define PIN_PA23C_SERCOM3_PAD1 _L_(23) /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
1144 #define PIN_PB21C_SERCOM3_PAD1 _L_(53) /**< \brief SERCOM3 signal: PAD1 on PB21 mux C */
1148 #define PIN_PA18D_SERCOM3_PAD2 _L_(18) /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
1152 #define PIN_PA20D_SERCOM3_PAD2 _L_(20) /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */
1156 #define PIN_PD20D_SERCOM3_PAD2 _L_(116) /**< \brief SERCOM3 signal: PAD2 on PD20 mux D */
1160 #define PIN_PA24C_SERCOM3_PAD2 _L_(24) /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
1164 #define PIN_PA19D_SERCOM3_PAD3 _L_(19) /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
1168 #define PIN_PA21D_SERCOM3_PAD3 _L_(21) /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */
1172 #define PIN_PD21D_SERCOM3_PAD3 _L_(117) /**< \brief SERCOM3 signal: PAD3 on PD21 mux D */
1176 #define PIN_PA25C_SERCOM3_PAD3 _L_(25) /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
1181 #define PIN_PA20G_TCC0_WO0 _L_(20) /**< \brief TCC0 signal: WO0 on PA20 mux G */
1185 #define PIN_PB12G_TCC0_WO0 _L_(44) /**< \brief TCC0 signal: WO0 on PB12 mux G */
1189 #define PIN_PA08F_TCC0_WO0 _L_(8) /**< \brief TCC0 signal: WO0 on PA08 mux F */
1193 #define PIN_PC04F_TCC0_WO0 _L_(68) /**< \brief TCC0 signal: WO0 on PC04 mux F */
1197 #define PIN_PC10F_TCC0_WO0 _L_(74) /**< \brief TCC0 signal: WO0 on PC10 mux F */
1201 #define PIN_PC16F_TCC0_WO0 _L_(80) /**< \brief TCC0 signal: WO0 on PC16 mux F */
1205 #define PIN_PA21G_TCC0_WO1 _L_(21) /**< \brief TCC0 signal: WO1 on PA21 mux G */
1209 #define PIN_PB13G_TCC0_WO1 _L_(45) /**< \brief TCC0 signal: WO1 on PB13 mux G */
1213 #define PIN_PA09F_TCC0_WO1 _L_(9) /**< \brief TCC0 signal: WO1 on PA09 mux F */
1217 #define PIN_PC11F_TCC0_WO1 _L_(75) /**< \brief TCC0 signal: WO1 on PC11 mux F */
1221 #define PIN_PC17F_TCC0_WO1 _L_(81) /**< \brief TCC0 signal: WO1 on PC17 mux F */
1225 #define PIN_PD08F_TCC0_WO1 _L_(104) /**< \brief TCC0 signal: WO1 on PD08 mux F */
1229 #define PIN_PA22G_TCC0_WO2 _L_(22) /**< \brief TCC0 signal: WO2 on PA22 mux G */
1233 #define PIN_PB14G_TCC0_WO2 _L_(46) /**< \brief TCC0 signal: WO2 on PB14 mux G */
1237 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
1241 #define PIN_PC12F_TCC0_WO2 _L_(76) /**< \brief TCC0 signal: WO2 on PC12 mux F */
1245 #define PIN_PC18F_TCC0_WO2 _L_(82) /**< \brief TCC0 signal: WO2 on PC18 mux F */
1249 #define PIN_PD09F_TCC0_WO2 _L_(105) /**< \brief TCC0 signal: WO2 on PD09 mux F */
1253 #define PIN_PA23G_TCC0_WO3 _L_(23) /**< \brief TCC0 signal: WO3 on PA23 mux G */
1257 #define PIN_PB15G_TCC0_WO3 _L_(47) /**< \brief TCC0 signal: WO3 on PB15 mux G */
1261 #define PIN_PA11F_TCC0_WO3 _L_(11) /**< \brief TCC0 signal: WO3 on PA11 mux F */
1265 #define PIN_PC13F_TCC0_WO3 _L_(77) /**< \brief TCC0 signal: WO3 on PC13 mux F */
1269 #define PIN_PC19F_TCC0_WO3 _L_(83) /**< \brief TCC0 signal: WO3 on PC19 mux F */
1273 #define PIN_PD10F_TCC0_WO3 _L_(106) /**< \brief TCC0 signal: WO3 on PD10 mux F */
1277 #define PIN_PA16G_TCC0_WO4 _L_(16) /**< \brief TCC0 signal: WO4 on PA16 mux G */
1281 #define PIN_PB16G_TCC0_WO4 _L_(48) /**< \brief TCC0 signal: WO4 on PB16 mux G */
1285 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
1289 #define PIN_PC14F_TCC0_WO4 _L_(78) /**< \brief TCC0 signal: WO4 on PC14 mux F */
1293 #define PIN_PC20F_TCC0_WO4 _L_(84) /**< \brief TCC0 signal: WO4 on PC20 mux F */
1297 #define PIN_PD11F_TCC0_WO4 _L_(107) /**< \brief TCC0 signal: WO4 on PD11 mux F */
1301 #define PIN_PA17G_TCC0_WO5 _L_(17) /**< \brief TCC0 signal: WO5 on PA17 mux G */
1305 #define PIN_PB17G_TCC0_WO5 _L_(49) /**< \brief TCC0 signal: WO5 on PB17 mux G */
1309 #define PIN_PB11F_TCC0_WO5 _L_(43) /**< \brief TCC0 signal: WO5 on PB11 mux F */
1313 #define PIN_PC15F_TCC0_WO5 _L_(79) /**< \brief TCC0 signal: WO5 on PC15 mux F */
1317 #define PIN_PC21F_TCC0_WO5 _L_(85) /**< \brief TCC0 signal: WO5 on PC21 mux F */
1321 #define PIN_PD12F_TCC0_WO5 _L_(108) /**< \brief TCC0 signal: WO5 on PD12 mux F */
1325 #define PIN_PA18G_TCC0_WO6 _L_(18) /**< \brief TCC0 signal: WO6 on PA18 mux G */
1329 #define PIN_PB30G_TCC0_WO6 _L_(62) /**< \brief TCC0 signal: WO6 on PB30 mux G */
1333 #define PIN_PA12F_TCC0_WO6 _L_(12) /**< \brief TCC0 signal: WO6 on PA12 mux F */
1337 #define PIN_PC22F_TCC0_WO6 _L_(86) /**< \brief TCC0 signal: WO6 on PC22 mux F */
1341 #define PIN_PA19G_TCC0_WO7 _L_(19) /**< \brief TCC0 signal: WO7 on PA19 mux G */
1345 #define PIN_PB31G_TCC0_WO7 _L_(63) /**< \brief TCC0 signal: WO7 on PB31 mux G */
1349 #define PIN_PA13F_TCC0_WO7 _L_(13) /**< \brief TCC0 signal: WO7 on PA13 mux F */
1353 #define PIN_PC23F_TCC0_WO7 _L_(87) /**< \brief TCC0 signal: WO7 on PC23 mux F */
1358 #define PIN_PB10G_TCC1_WO0 _L_(42) /**< \brief TCC1 signal: WO0 on PB10 mux G */
1362 #define PIN_PC14G_TCC1_WO0 _L_(78) /**< \brief TCC1 signal: WO0 on PC14 mux G */
1366 #define PIN_PA16F_TCC1_WO0 _L_(16) /**< \brief TCC1 signal: WO0 on PA16 mux F */
1370 #define PIN_PB18F_TCC1_WO0 _L_(50) /**< \brief TCC1 signal: WO0 on PB18 mux F */
1374 #define PIN_PD20F_TCC1_WO0 _L_(116) /**< \brief TCC1 signal: WO0 on PD20 mux F */
1378 #define PIN_PB11G_TCC1_WO1 _L_(43) /**< \brief TCC1 signal: WO1 on PB11 mux G */
1382 #define PIN_PC15G_TCC1_WO1 _L_(79) /**< \brief TCC1 signal: WO1 on PC15 mux G */
1386 #define PIN_PA17F_TCC1_WO1 _L_(17) /**< \brief TCC1 signal: WO1 on PA17 mux F */
1390 #define PIN_PB19F_TCC1_WO1 _L_(51) /**< \brief TCC1 signal: WO1 on PB19 mux F */
1394 #define PIN_PD21F_TCC1_WO1 _L_(117) /**< \brief TCC1 signal: WO1 on PD21 mux F */
1398 #define PIN_PA12G_TCC1_WO2 _L_(12) /**< \brief TCC1 signal: WO2 on PA12 mux G */
1402 #define PIN_PA14G_TCC1_WO2 _L_(14) /**< \brief TCC1 signal: WO2 on PA14 mux G */
1406 #define PIN_PA18F_TCC1_WO2 _L_(18) /**< \brief TCC1 signal: WO2 on PA18 mux F */
1410 #define PIN_PB20F_TCC1_WO2 _L_(52) /**< \brief TCC1 signal: WO2 on PB20 mux F */
1414 #define PIN_PB26F_TCC1_WO2 _L_(58) /**< \brief TCC1 signal: WO2 on PB26 mux F */
1418 #define PIN_PA13G_TCC1_WO3 _L_(13) /**< \brief TCC1 signal: WO3 on PA13 mux G */
1422 #define PIN_PA15G_TCC1_WO3 _L_(15) /**< \brief TCC1 signal: WO3 on PA15 mux G */
1426 #define PIN_PA19F_TCC1_WO3 _L_(19) /**< \brief TCC1 signal: WO3 on PA19 mux F */
1430 #define PIN_PB21F_TCC1_WO3 _L_(53) /**< \brief TCC1 signal: WO3 on PB21 mux F */
1434 #define PIN_PB27F_TCC1_WO3 _L_(59) /**< \brief TCC1 signal: WO3 on PB27 mux F */
1438 #define PIN_PA08G_TCC1_WO4 _L_(8) /**< \brief TCC1 signal: WO4 on PA08 mux G */
1442 #define PIN_PC10G_TCC1_WO4 _L_(74) /**< \brief TCC1 signal: WO4 on PC10 mux G */
1446 #define PIN_PA20F_TCC1_WO4 _L_(20) /**< \brief TCC1 signal: WO4 on PA20 mux F */
1450 #define PIN_PB28F_TCC1_WO4 _L_(60) /**< \brief TCC1 signal: WO4 on PB28 mux F */
1454 #define PIN_PA09G_TCC1_WO5 _L_(9) /**< \brief TCC1 signal: WO5 on PA09 mux G */
1458 #define PIN_PC11G_TCC1_WO5 _L_(75) /**< \brief TCC1 signal: WO5 on PC11 mux G */
1462 #define PIN_PA21F_TCC1_WO5 _L_(21) /**< \brief TCC1 signal: WO5 on PA21 mux F */
1466 #define PIN_PB29F_TCC1_WO5 _L_(61) /**< \brief TCC1 signal: WO5 on PB29 mux F */
1470 #define PIN_PA10G_TCC1_WO6 _L_(10) /**< \brief TCC1 signal: WO6 on PA10 mux G */
1474 #define PIN_PC12G_TCC1_WO6 _L_(76) /**< \brief TCC1 signal: WO6 on PC12 mux G */
1478 #define PIN_PA22F_TCC1_WO6 _L_(22) /**< \brief TCC1 signal: WO6 on PA22 mux F */
1482 #define PIN_PA11G_TCC1_WO7 _L_(11) /**< \brief TCC1 signal: WO7 on PA11 mux G */
1486 #define PIN_PC13G_TCC1_WO7 _L_(77) /**< \brief TCC1 signal: WO7 on PC13 mux G */
1490 #define PIN_PA23F_TCC1_WO7 _L_(23) /**< \brief TCC1 signal: WO7 on PA23 mux F */
1495 #define PIN_PA12E_TC2_WO0 _L_(12) /**< \brief TC2 signal: WO0 on PA12 mux E */
1499 #define PIN_PA16E_TC2_WO0 _L_(16) /**< \brief TC2 signal: WO0 on PA16 mux E */
1503 #define PIN_PA00E_TC2_WO0 _L_(0) /**< \brief TC2 signal: WO0 on PA00 mux E */
1507 #define PIN_PA01E_TC2_WO1 _L_(1) /**< \brief TC2 signal: WO1 on PA01 mux E */
1511 #define PIN_PA13E_TC2_WO1 _L_(13) /**< \brief TC2 signal: WO1 on PA13 mux E */
1515 #define PIN_PA17E_TC2_WO1 _L_(17) /**< \brief TC2 signal: WO1 on PA17 mux E */
1520 #define PIN_PA18E_TC3_WO0 _L_(18) /**< \brief TC3 signal: WO0 on PA18 mux E */
1524 #define PIN_PA14E_TC3_WO0 _L_(14) /**< \brief TC3 signal: WO0 on PA14 mux E */
1528 #define PIN_PA15E_TC3_WO1 _L_(15) /**< \brief TC3 signal: WO1 on PA15 mux E */
1532 #define PIN_PA19E_TC3_WO1 _L_(19) /**< \brief TC3 signal: WO1 on PA19 mux E */
1537 #define PIN_PA23I_CAN0_RX _L_(23) /**< \brief CAN0 signal: RX on PA23 mux I */
1541 #define PIN_PA25I_CAN0_RX _L_(25) /**< \brief CAN0 signal: RX on PA25 mux I */
1545 #define PIN_PA22I_CAN0_TX _L_(22) /**< \brief CAN0 signal: TX on PA22 mux I */
1549 #define PIN_PA24I_CAN0_TX _L_(24) /**< \brief CAN0 signal: TX on PA24 mux I */
1554 #define PIN_PB13H_CAN1_RX _L_(45) /**< \brief CAN1 signal: RX on PB13 mux H */
1558 #define PIN_PB15H_CAN1_RX _L_(47) /**< \brief CAN1 signal: RX on PB15 mux H */
1562 #define PIN_PB12H_CAN1_TX _L_(44) /**< \brief CAN1 signal: TX on PB12 mux H */
1566 #define PIN_PB14H_CAN1_TX _L_(46) /**< \brief CAN1 signal: TX on PB14 mux H */
1571 #define PIN_PC21L_GMAC_GCOL _L_(85) /**< \brief GMAC signal: GCOL on PC21 mux L */
1575 #define PIN_PA16L_GMAC_GCRS _L_(16) /**< \brief GMAC signal: GCRS on PA16 mux L */
1579 #define PIN_PA20L_GMAC_GMDC _L_(20) /**< \brief GMAC signal: GMDC on PA20 mux L */
1583 #define PIN_PB14L_GMAC_GMDC _L_(46) /**< \brief GMAC signal: GMDC on PB14 mux L */
1587 #define PIN_PC11L_GMAC_GMDC _L_(75) /**< \brief GMAC signal: GMDC on PC11 mux L */
1591 #define PIN_PC22L_GMAC_GMDC _L_(86) /**< \brief GMAC signal: GMDC on PC22 mux L */
1595 #define PIN_PA21L_GMAC_GMDIO _L_(21) /**< \brief GMAC signal: GMDIO on PA21 mux L */
1599 #define PIN_PB15L_GMAC_GMDIO _L_(47) /**< \brief GMAC signal: GMDIO on PB15 mux L */
1603 #define PIN_PC12L_GMAC_GMDIO _L_(76) /**< \brief GMAC signal: GMDIO on PC12 mux L */
1607 #define PIN_PC23L_GMAC_GMDIO _L_(87) /**< \brief GMAC signal: GMDIO on PC23 mux L */
1611 #define PIN_PA13L_GMAC_GRX0 _L_(13) /**< \brief GMAC signal: GRX0 on PA13 mux L */
1615 #define PIN_PA12L_GMAC_GRX1 _L_(12) /**< \brief GMAC signal: GRX1 on PA12 mux L */
1619 #define PIN_PC15L_GMAC_GRX2 _L_(79) /**< \brief GMAC signal: GRX2 on PC15 mux L */
1623 #define PIN_PC14L_GMAC_GRX3 _L_(78) /**< \brief GMAC signal: GRX3 on PC14 mux L */
1627 #define PIN_PC18L_GMAC_GRXCK _L_(82) /**< \brief GMAC signal: GRXCK on PC18 mux L */
1631 #define PIN_PC20L_GMAC_GRXDV _L_(84) /**< \brief GMAC signal: GRXDV on PC20 mux L */
1635 #define PIN_PA15L_GMAC_GRXER _L_(15) /**< \brief GMAC signal: GRXER on PA15 mux L */
1639 #define PIN_PA18L_GMAC_GTX0 _L_(18) /**< \brief GMAC signal: GTX0 on PA18 mux L */
1643 #define PIN_PA19L_GMAC_GTX1 _L_(19) /**< \brief GMAC signal: GTX1 on PA19 mux L */
1647 #define PIN_PC16L_GMAC_GTX2 _L_(80) /**< \brief GMAC signal: GTX2 on PC16 mux L */
1651 #define PIN_PC17L_GMAC_GTX3 _L_(81) /**< \brief GMAC signal: GTX3 on PC17 mux L */
1655 #define PIN_PA14L_GMAC_GTXCK _L_(14) /**< \brief GMAC signal: GTXCK on PA14 mux L */
1659 #define PIN_PA17L_GMAC_GTXEN _L_(17) /**< \brief GMAC signal: GTXEN on PA17 mux L */
1663 #define PIN_PC19L_GMAC_GTXER _L_(83) /**< \brief GMAC signal: GTXER on PC19 mux L */
1668 #define PIN_PA14F_TCC2_WO0 _L_(14) /**< \brief TCC2 signal: WO0 on PA14 mux F */
1672 #define PIN_PA30F_TCC2_WO0 _L_(30) /**< \brief TCC2 signal: WO0 on PA30 mux F */
1676 #define PIN_PA15F_TCC2_WO1 _L_(15) /**< \brief TCC2 signal: WO1 on PA15 mux F */
1680 #define PIN_PA31F_TCC2_WO1 _L_(31) /**< \brief TCC2 signal: WO1 on PA31 mux F */
1684 #define PIN_PA24F_TCC2_WO2 _L_(24) /**< \brief TCC2 signal: WO2 on PA24 mux F */
1688 #define PIN_PB02F_TCC2_WO2 _L_(34) /**< \brief TCC2 signal: WO2 on PB02 mux F */
1693 #define PIN_PB12F_TCC3_WO0 _L_(44) /**< \brief TCC3 signal: WO0 on PB12 mux F */
1697 #define PIN_PB16F_TCC3_WO0 _L_(48) /**< \brief TCC3 signal: WO0 on PB16 mux F */
1701 #define PIN_PB13F_TCC3_WO1 _L_(45) /**< \brief TCC3 signal: WO1 on PB13 mux F */
1705 #define PIN_PB17F_TCC3_WO1 _L_(49) /**< \brief TCC3 signal: WO1 on PB17 mux F */
1710 #define PIN_PA22E_TC4_WO0 _L_(22) /**< \brief TC4 signal: WO0 on PA22 mux E */
1714 #define PIN_PB08E_TC4_WO0 _L_(40) /**< \brief TC4 signal: WO0 on PB08 mux E */
1718 #define PIN_PB12E_TC4_WO0 _L_(44) /**< \brief TC4 signal: WO0 on PB12 mux E */
1722 #define PIN_PA23E_TC4_WO1 _L_(23) /**< \brief TC4 signal: WO1 on PA23 mux E */
1726 #define PIN_PB09E_TC4_WO1 _L_(41) /**< \brief TC4 signal: WO1 on PB09 mux E */
1730 #define PIN_PB13E_TC4_WO1 _L_(45) /**< \brief TC4 signal: WO1 on PB13 mux E */
1735 #define PIN_PA24E_TC5_WO0 _L_(24) /**< \brief TC5 signal: WO0 on PA24 mux E */
1739 #define PIN_PB10E_TC5_WO0 _L_(42) /**< \brief TC5 signal: WO0 on PB10 mux E */
1743 #define PIN_PB14E_TC5_WO0 _L_(46) /**< \brief TC5 signal: WO0 on PB14 mux E */
1747 #define PIN_PA25E_TC5_WO1 _L_(25) /**< \brief TC5 signal: WO1 on PA25 mux E */
1751 #define PIN_PB11E_TC5_WO1 _L_(43) /**< \brief TC5 signal: WO1 on PB11 mux E */
1755 #define PIN_PB15E_TC5_WO1 _L_(47) /**< \brief TC5 signal: WO1 on PB15 mux E */
1760 #define PIN_PB18G_PDEC_QDI0 _L_(50) /**< \brief PDEC signal: QDI0 on PB18 mux G */
1764 #define PIN_PB23G_PDEC_QDI0 _L_(55) /**< \brief PDEC signal: QDI0 on PB23 mux G */
1768 #define PIN_PC16G_PDEC_QDI0 _L_(80) /**< \brief PDEC signal: QDI0 on PC16 mux G */
1772 #define PIN_PA24G_PDEC_QDI0 _L_(24) /**< \brief PDEC signal: QDI0 on PA24 mux G */
1776 #define PIN_PB19G_PDEC_QDI1 _L_(51) /**< \brief PDEC signal: QDI1 on PB19 mux G */
1780 #define PIN_PB24G_PDEC_QDI1 _L_(56) /**< \brief PDEC signal: QDI1 on PB24 mux G */
1784 #define PIN_PC17G_PDEC_QDI1 _L_(81) /**< \brief PDEC signal: QDI1 on PC17 mux G */
1788 #define PIN_PA25G_PDEC_QDI1 _L_(25) /**< \brief PDEC signal: QDI1 on PA25 mux G */
1792 #define PIN_PB20G_PDEC_QDI2 _L_(52) /**< \brief PDEC signal: QDI2 on PB20 mux G */
1796 #define PIN_PB25G_PDEC_QDI2 _L_(57) /**< \brief PDEC signal: QDI2 on PB25 mux G */
1800 #define PIN_PC18G_PDEC_QDI2 _L_(82) /**< \brief PDEC signal: QDI2 on PC18 mux G */
1804 #define PIN_PB22G_PDEC_QDI2 _L_(54) /**< \brief PDEC signal: QDI2 on PB22 mux G */
1809 #define PIN_PA04B_AC_AIN0 _L_(4) /**< \brief AC signal: AIN0 on PA04 mux B */
1813 #define PIN_PA05B_AC_AIN1 _L_(5) /**< \brief AC signal: AIN1 on PA05 mux B */
1817 #define PIN_PA06B_AC_AIN2 _L_(6) /**< \brief AC signal: AIN2 on PA06 mux B */
1821 #define PIN_PA07B_AC_AIN3 _L_(7) /**< \brief AC signal: AIN3 on PA07 mux B */
1825 #define PIN_PA12M_AC_CMP0 _L_(12) /**< \brief AC signal: CMP0 on PA12 mux M */
1829 #define PIN_PA18M_AC_CMP0 _L_(18) /**< \brief AC signal: CMP0 on PA18 mux M */
1833 #define PIN_PB24M_AC_CMP0 _L_(56) /**< \brief AC signal: CMP0 on PB24 mux M */
1837 #define PIN_PA13M_AC_CMP1 _L_(13) /**< \brief AC signal: CMP1 on PA13 mux M */
1841 #define PIN_PA19M_AC_CMP1 _L_(19) /**< \brief AC signal: CMP1 on PA19 mux M */
1845 #define PIN_PB25M_AC_CMP1 _L_(57) /**< \brief AC signal: CMP1 on PB25 mux M */
1850 #define PIN_PB11H_QSPI_CS _L_(43) /**< \brief QSPI signal: CS on PB11 mux H */
1854 #define PIN_PA08H_QSPI_DATA0 _L_(8) /**< \brief QSPI signal: DATA0 on PA08 mux H */
1858 #define PIN_PA09H_QSPI_DATA1 _L_(9) /**< \brief QSPI signal: DATA1 on PA09 mux H */
1862 #define PIN_PA10H_QSPI_DATA2 _L_(10) /**< \brief QSPI signal: DATA2 on PA10 mux H */
1866 #define PIN_PA11H_QSPI_DATA3 _L_(11) /**< \brief QSPI signal: DATA3 on PA11 mux H */
1870 #define PIN_PB10H_QSPI_SCK _L_(42) /**< \brief QSPI signal: SCK on PB10 mux H */
1875 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */
1879 #define PIN_PA16N_CCL_IN0 _L_(16) /**< \brief CCL signal: IN0 on PA16 mux N */
1883 #define PIN_PB22N_CCL_IN0 _L_(54) /**< \brief CCL signal: IN0 on PB22 mux N */
1887 #define PIN_PA05N_CCL_IN1 _L_(5) /**< \brief CCL signal: IN1 on PA05 mux N */
1891 #define PIN_PA17N_CCL_IN1 _L_(17) /**< \brief CCL signal: IN1 on PA17 mux N */
1895 #define PIN_PB00N_CCL_IN1 _L_(32) /**< \brief CCL signal: IN1 on PB00 mux N */
1899 #define PIN_PA06N_CCL_IN2 _L_(6) /**< \brief CCL signal: IN2 on PA06 mux N */
1903 #define PIN_PA18N_CCL_IN2 _L_(18) /**< \brief CCL signal: IN2 on PA18 mux N */
1907 #define PIN_PB01N_CCL_IN2 _L_(33) /**< \brief CCL signal: IN2 on PB01 mux N */
1911 #define PIN_PA08N_CCL_IN3 _L_(8) /**< \brief CCL signal: IN3 on PA08 mux N */
1915 #define PIN_PA30N_CCL_IN3 _L_(30) /**< \brief CCL signal: IN3 on PA30 mux N */
1919 #define PIN_PA09N_CCL_IN4 _L_(9) /**< \brief CCL signal: IN4 on PA09 mux N */
1923 #define PIN_PC27N_CCL_IN4 _L_(91) /**< \brief CCL signal: IN4 on PC27 mux N */
1927 #define PIN_PA10N_CCL_IN5 _L_(10) /**< \brief CCL signal: IN5 on PA10 mux N */
1931 #define PIN_PC28N_CCL_IN5 _L_(92) /**< \brief CCL signal: IN5 on PC28 mux N */
1935 #define PIN_PA22N_CCL_IN6 _L_(22) /**< \brief CCL signal: IN6 on PA22 mux N */
1939 #define PIN_PB06N_CCL_IN6 _L_(38) /**< \brief CCL signal: IN6 on PB06 mux N */
1943 #define PIN_PA23N_CCL_IN7 _L_(23) /**< \brief CCL signal: IN7 on PA23 mux N */
1947 #define PIN_PB07N_CCL_IN7 _L_(39) /**< \brief CCL signal: IN7 on PB07 mux N */
1951 #define PIN_PA24N_CCL_IN8 _L_(24) /**< \brief CCL signal: IN8 on PA24 mux N */
1955 #define PIN_PB08N_CCL_IN8 _L_(40) /**< \brief CCL signal: IN8 on PB08 mux N */
1959 #define PIN_PB14N_CCL_IN9 _L_(46) /**< \brief CCL signal: IN9 on PB14 mux N */
1963 #define PIN_PC20N_CCL_IN9 _L_(84) /**< \brief CCL signal: IN9 on PC20 mux N */
1967 #define PIN_PB15N_CCL_IN10 _L_(47) /**< \brief CCL signal: IN10 on PB15 mux N */
1971 #define PIN_PC21N_CCL_IN10 _L_(85) /**< \brief CCL signal: IN10 on PC21 mux N */
1975 #define PIN_PB10N_CCL_IN11 _L_(42) /**< \brief CCL signal: IN11 on PB10 mux N */
1979 #define PIN_PB16N_CCL_IN11 _L_(48) /**< \brief CCL signal: IN11 on PB16 mux N */
1983 #define PIN_PA07N_CCL_OUT0 _L_(7) /**< \brief CCL signal: OUT0 on PA07 mux N */
1987 #define PIN_PA19N_CCL_OUT0 _L_(19) /**< \brief CCL signal: OUT0 on PA19 mux N */
1991 #define PIN_PB02N_CCL_OUT0 _L_(34) /**< \brief CCL signal: OUT0 on PB02 mux N */
1995 #define PIN_PB23N_CCL_OUT0 _L_(55) /**< \brief CCL signal: OUT0 on PB23 mux N */
1999 #define PIN_PA11N_CCL_OUT1 _L_(11) /**< \brief CCL signal: OUT1 on PA11 mux N */
2003 #define PIN_PA31N_CCL_OUT1 _L_(31) /**< \brief CCL signal: OUT1 on PA31 mux N */
2007 #define PIN_PB11N_CCL_OUT1 _L_(43) /**< \brief CCL signal: OUT1 on PB11 mux N */
2011 #define PIN_PA25N_CCL_OUT2 _L_(25) /**< \brief CCL signal: OUT2 on PA25 mux N */
2015 #define PIN_PB09N_CCL_OUT2 _L_(41) /**< \brief CCL signal: OUT2 on PB09 mux N */
2019 #define PIN_PB17N_CCL_OUT3 _L_(49) /**< \brief CCL signal: OUT3 on PB17 mux N */
2024 #define PIN_PA13D_SERCOM4_PAD0 _L_(13) /**< \brief SERCOM4 signal: PAD0 on PA13 mux D */
2028 #define PIN_PB08D_SERCOM4_PAD0 _L_(40) /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */
2032 #define PIN_PB27D_SERCOM4_PAD0 _L_(59) /**< \brief SERCOM4 signal: PAD0 on PB27 mux D */
2036 #define PIN_PB12C_SERCOM4_PAD0 _L_(44) /**< \brief SERCOM4 signal: PAD0 on PB12 mux C */
2040 #define PIN_PA12D_SERCOM4_PAD1 _L_(12) /**< \brief SERCOM4 signal: PAD1 on PA12 mux D */
2044 #define PIN_PB09D_SERCOM4_PAD1 _L_(41) /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */
2048 #define PIN_PB26D_SERCOM4_PAD1 _L_(58) /**< \brief SERCOM4 signal: PAD1 on PB26 mux D */
2052 #define PIN_PB13C_SERCOM4_PAD1 _L_(45) /**< \brief SERCOM4 signal: PAD1 on PB13 mux C */
2056 #define PIN_PA14D_SERCOM4_PAD2 _L_(14) /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */
2060 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
2064 #define PIN_PB28D_SERCOM4_PAD2 _L_(60) /**< \brief SERCOM4 signal: PAD2 on PB28 mux D */
2068 #define PIN_PB14C_SERCOM4_PAD2 _L_(46) /**< \brief SERCOM4 signal: PAD2 on PB14 mux C */
2072 #define PIN_PB11D_SERCOM4_PAD3 _L_(43) /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */
2076 #define PIN_PB29D_SERCOM4_PAD3 _L_(61) /**< \brief SERCOM4 signal: PAD3 on PB29 mux D */
2080 #define PIN_PA15D_SERCOM4_PAD3 _L_(15) /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */
2084 #define PIN_PB15C_SERCOM4_PAD3 _L_(47) /**< \brief SERCOM4 signal: PAD3 on PB15 mux C */
2089 #define PIN_PA23D_SERCOM5_PAD0 _L_(23) /**< \brief SERCOM5 signal: PAD0 on PA23 mux D */
2093 #define PIN_PB02D_SERCOM5_PAD0 _L_(34) /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */
2097 #define PIN_PB31D_SERCOM5_PAD0 _L_(63) /**< \brief SERCOM5 signal: PAD0 on PB31 mux D */
2101 #define PIN_PB16C_SERCOM5_PAD0 _L_(48) /**< \brief SERCOM5 signal: PAD0 on PB16 mux C */
2105 #define PIN_PA22D_SERCOM5_PAD1 _L_(22) /**< \brief SERCOM5 signal: PAD1 on PA22 mux D */
2109 #define PIN_PB03D_SERCOM5_PAD1 _L_(35) /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */
2113 #define PIN_PB30D_SERCOM5_PAD1 _L_(62) /**< \brief SERCOM5 signal: PAD1 on PB30 mux D */
2117 #define PIN_PB17C_SERCOM5_PAD1 _L_(49) /**< \brief SERCOM5 signal: PAD1 on PB17 mux C */
2121 #define PIN_PA24D_SERCOM5_PAD2 _L_(24) /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */
2125 #define PIN_PB00D_SERCOM5_PAD2 _L_(32) /**< \brief SERCOM5 signal: PAD2 on PB00 mux D */
2129 #define PIN_PB22D_SERCOM5_PAD2 _L_(54) /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */
2133 #define PIN_PA20C_SERCOM5_PAD2 _L_(20) /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */
2137 #define PIN_PB18C_SERCOM5_PAD2 _L_(50) /**< \brief SERCOM5 signal: PAD2 on PB18 mux C */
2141 #define PIN_PA25D_SERCOM5_PAD3 _L_(25) /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */
2145 #define PIN_PB01D_SERCOM5_PAD3 _L_(33) /**< \brief SERCOM5 signal: PAD3 on PB01 mux D */
2149 #define PIN_PB23D_SERCOM5_PAD3 _L_(55) /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */
2153 #define PIN_PA21C_SERCOM5_PAD3 _L_(21) /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */
2157 #define PIN_PB19C_SERCOM5_PAD3 _L_(51) /**< \brief SERCOM5 signal: PAD3 on PB19 mux C */
2162 #define PIN_PD09D_SERCOM6_PAD0 _L_(105) /**< \brief SERCOM6 signal: PAD0 on PD09 mux D */
2166 #define PIN_PC13D_SERCOM6_PAD0 _L_(77) /**< \brief SERCOM6 signal: PAD0 on PC13 mux D */
2170 #define PIN_PC04C_SERCOM6_PAD0 _L_(68) /**< \brief SERCOM6 signal: PAD0 on PC04 mux C */
2174 #define PIN_PC16C_SERCOM6_PAD0 _L_(80) /**< \brief SERCOM6 signal: PAD0 on PC16 mux C */
2178 #define PIN_PD08D_SERCOM6_PAD1 _L_(104) /**< \brief SERCOM6 signal: PAD1 on PD08 mux D */
2182 #define PIN_PC12D_SERCOM6_PAD1 _L_(76) /**< \brief SERCOM6 signal: PAD1 on PC12 mux D */
2186 #define PIN_PC05C_SERCOM6_PAD1 _L_(69) /**< \brief SERCOM6 signal: PAD1 on PC05 mux C */
2190 #define PIN_PC17C_SERCOM6_PAD1 _L_(81) /**< \brief SERCOM6 signal: PAD1 on PC17 mux C */
2194 #define PIN_PC14D_SERCOM6_PAD2 _L_(78) /**< \brief SERCOM6 signal: PAD2 on PC14 mux D */
2198 #define PIN_PD10D_SERCOM6_PAD2 _L_(106) /**< \brief SERCOM6 signal: PAD2 on PD10 mux D */
2202 #define PIN_PC06C_SERCOM6_PAD2 _L_(70) /**< \brief SERCOM6 signal: PAD2 on PC06 mux C */
2206 #define PIN_PC10C_SERCOM6_PAD2 _L_(74) /**< \brief SERCOM6 signal: PAD2 on PC10 mux C */
2210 #define PIN_PC18C_SERCOM6_PAD2 _L_(82) /**< \brief SERCOM6 signal: PAD2 on PC18 mux C */
2214 #define PIN_PC15D_SERCOM6_PAD3 _L_(79) /**< \brief SERCOM6 signal: PAD3 on PC15 mux D */
2218 #define PIN_PD11D_SERCOM6_PAD3 _L_(107) /**< \brief SERCOM6 signal: PAD3 on PD11 mux D */
2222 #define PIN_PC07C_SERCOM6_PAD3 _L_(71) /**< \brief SERCOM6 signal: PAD3 on PC07 mux C */
2226 #define PIN_PC11C_SERCOM6_PAD3 _L_(75) /**< \brief SERCOM6 signal: PAD3 on PC11 mux C */
2230 #define PIN_PC19C_SERCOM6_PAD3 _L_(83) /**< \brief SERCOM6 signal: PAD3 on PC19 mux C */
2235 #define PIN_PB21D_SERCOM7_PAD0 _L_(53) /**< \brief SERCOM7 signal: PAD0 on PB21 mux D */
2239 #define PIN_PD08C_SERCOM7_PAD0 _L_(104) /**< \brief SERCOM7 signal: PAD0 on PD08 mux C */
2243 #define PIN_PB30C_SERCOM7_PAD0 _L_(62) /**< \brief SERCOM7 signal: PAD0 on PB30 mux C */
2247 #define PIN_PC12C_SERCOM7_PAD0 _L_(76) /**< \brief SERCOM7 signal: PAD0 on PC12 mux C */
2251 #define PIN_PB20D_SERCOM7_PAD1 _L_(52) /**< \brief SERCOM7 signal: PAD1 on PB20 mux D */
2255 #define PIN_PD09C_SERCOM7_PAD1 _L_(105) /**< \brief SERCOM7 signal: PAD1 on PD09 mux C */
2259 #define PIN_PB31C_SERCOM7_PAD1 _L_(63) /**< \brief SERCOM7 signal: PAD1 on PB31 mux C */
2263 #define PIN_PC13C_SERCOM7_PAD1 _L_(77) /**< \brief SERCOM7 signal: PAD1 on PC13 mux C */
2267 #define PIN_PB18D_SERCOM7_PAD2 _L_(50) /**< \brief SERCOM7 signal: PAD2 on PB18 mux D */
2271 #define PIN_PC10D_SERCOM7_PAD2 _L_(74) /**< \brief SERCOM7 signal: PAD2 on PC10 mux D */
2275 #define PIN_PC14C_SERCOM7_PAD2 _L_(78) /**< \brief SERCOM7 signal: PAD2 on PC14 mux C */
2279 #define PIN_PD10C_SERCOM7_PAD2 _L_(106) /**< \brief SERCOM7 signal: PAD2 on PD10 mux C */
2283 #define PIN_PA30C_SERCOM7_PAD2 _L_(30) /**< \brief SERCOM7 signal: PAD2 on PA30 mux C */
2287 #define PIN_PB19D_SERCOM7_PAD3 _L_(51) /**< \brief SERCOM7 signal: PAD3 on PB19 mux D */
2291 #define PIN_PC11D_SERCOM7_PAD3 _L_(75) /**< \brief SERCOM7 signal: PAD3 on PC11 mux D */
2295 #define PIN_PC15C_SERCOM7_PAD3 _L_(79) /**< \brief SERCOM7 signal: PAD3 on PC15 mux C */
2299 #define PIN_PD11C_SERCOM7_PAD3 _L_(107) /**< \brief SERCOM7 signal: PAD3 on PD11 mux C */
2303 #define PIN_PA31C_SERCOM7_PAD3 _L_(31) /**< \brief SERCOM7 signal: PAD3 on PA31 mux C */
2308 #define PIN_PB14F_TCC4_WO0 _L_(46) /**< \brief TCC4 signal: WO0 on PB14 mux F */
2312 #define PIN_PB30F_TCC4_WO0 _L_(62) /**< \brief TCC4 signal: WO0 on PB30 mux F */
2316 #define PIN_PB15F_TCC4_WO1 _L_(47) /**< \brief TCC4 signal: WO1 on PB15 mux F */
2320 #define PIN_PB31F_TCC4_WO1 _L_(63) /**< \brief TCC4 signal: WO1 on PB31 mux F */
2325 #define PIN_PA30E_TC6_WO0 _L_(30) /**< \brief TC6 signal: WO0 on PA30 mux E */
2329 #define PIN_PB02E_TC6_WO0 _L_(34) /**< \brief TC6 signal: WO0 on PB02 mux E */
2333 #define PIN_PB16E_TC6_WO0 _L_(48) /**< \brief TC6 signal: WO0 on PB16 mux E */
2337 #define PIN_PA31E_TC6_WO1 _L_(31) /**< \brief TC6 signal: WO1 on PA31 mux E */
2341 #define PIN_PB03E_TC6_WO1 _L_(35) /**< \brief TC6 signal: WO1 on PB03 mux E */
2345 #define PIN_PB17E_TC6_WO1 _L_(49) /**< \brief TC6 signal: WO1 on PB17 mux E */
2350 #define PIN_PA20E_TC7_WO0 _L_(20) /**< \brief TC7 signal: WO0 on PA20 mux E */
2354 #define PIN_PB00E_TC7_WO0 _L_(32) /**< \brief TC7 signal: WO0 on PB00 mux E */
2358 #define PIN_PB22E_TC7_WO0 _L_(54) /**< \brief TC7 signal: WO0 on PB22 mux E */
2362 #define PIN_PA21E_TC7_WO1 _L_(21) /**< \brief TC7 signal: WO1 on PA21 mux E */
2366 #define PIN_PB01E_TC7_WO1 _L_(33) /**< \brief TC7 signal: WO1 on PB01 mux E */
2370 #define PIN_PB23E_TC7_WO1 _L_(55) /**< \brief TC7 signal: WO1 on PB23 mux E */
2375 #define PIN_PA02B_ADC0_AIN0 _L_(2) /**< \brief ADC0 signal: AIN0 on PA02 mux B */
2379 #define PIN_PA03B_ADC0_AIN1 _L_(3) /**< \brief ADC0 signal: AIN1 on PA03 mux B */
2383 #define PIN_PB08B_ADC0_AIN2 _L_(40) /**< \brief ADC0 signal: AIN2 on PB08 mux B */
2387 #define PIN_PB09B_ADC0_AIN3 _L_(41) /**< \brief ADC0 signal: AIN3 on PB09 mux B */
2391 #define PIN_PA04B_ADC0_AIN4 _L_(4) /**< \brief ADC0 signal: AIN4 on PA04 mux B */
2395 #define PIN_PA05B_ADC0_AIN5 _L_(5) /**< \brief ADC0 signal: AIN5 on PA05 mux B */
2399 #define PIN_PA06B_ADC0_AIN6 _L_(6) /**< \brief ADC0 signal: AIN6 on PA06 mux B */
2403 #define PIN_PA07B_ADC0_AIN7 _L_(7) /**< \brief ADC0 signal: AIN7 on PA07 mux B */
2407 #define PIN_PA08B_ADC0_AIN8 _L_(8) /**< \brief ADC0 signal: AIN8 on PA08 mux B */
2411 #define PIN_PA09B_ADC0_AIN9 _L_(9) /**< \brief ADC0 signal: AIN9 on PA09 mux B */
2415 #define PIN_PA10B_ADC0_AIN10 _L_(10) /**< \brief ADC0 signal: AIN10 on PA10 mux B */
2419 #define PIN_PA11B_ADC0_AIN11 _L_(11) /**< \brief ADC0 signal: AIN11 on PA11 mux B */
2423 #define PIN_PB00B_ADC0_AIN12 _L_(32) /**< \brief ADC0 signal: AIN12 on PB00 mux B */
2427 #define PIN_PB01B_ADC0_AIN13 _L_(33) /**< \brief ADC0 signal: AIN13 on PB01 mux B */
2431 #define PIN_PB02B_ADC0_AIN14 _L_(34) /**< \brief ADC0 signal: AIN14 on PB02 mux B */
2435 #define PIN_PB03B_ADC0_AIN15 _L_(35) /**< \brief ADC0 signal: AIN15 on PB03 mux B */
2439 #define PIN_PA03O_ADC0_DRV0 _L_(3) /**< \brief ADC0 signal: DRV0 on PA03 mux O */
2443 #define PIN_PB08O_ADC0_DRV1 _L_(40) /**< \brief ADC0 signal: DRV1 on PB08 mux O */
2447 #define PIN_PB09O_ADC0_DRV2 _L_(41) /**< \brief ADC0 signal: DRV2 on PB09 mux O */
2451 #define PIN_PA04O_ADC0_DRV3 _L_(4) /**< \brief ADC0 signal: DRV3 on PA04 mux O */
2455 #define PIN_PA06O_ADC0_DRV4 _L_(6) /**< \brief ADC0 signal: DRV4 on PA06 mux O */
2459 #define PIN_PA07O_ADC0_DRV5 _L_(7) /**< \brief ADC0 signal: DRV5 on PA07 mux O */
2463 #define PIN_PA08O_ADC0_DRV6 _L_(8) /**< \brief ADC0 signal: DRV6 on PA08 mux O */
2467 #define PIN_PA09O_ADC0_DRV7 _L_(9) /**< \brief ADC0 signal: DRV7 on PA09 mux O */
2471 #define PIN_PA10O_ADC0_DRV8 _L_(10) /**< \brief ADC0 signal: DRV8 on PA10 mux O */
2475 #define PIN_PA11O_ADC0_DRV9 _L_(11) /**< \brief ADC0 signal: DRV9 on PA11 mux O */
2479 #define PIN_PA16O_ADC0_DRV10 _L_(16) /**< \brief ADC0 signal: DRV10 on PA16 mux O */
2483 #define PIN_PA17O_ADC0_DRV11 _L_(17) /**< \brief ADC0 signal: DRV11 on PA17 mux O */
2487 #define PIN_PA18O_ADC0_DRV12 _L_(18) /**< \brief ADC0 signal: DRV12 on PA18 mux O */
2491 #define PIN_PA19O_ADC0_DRV13 _L_(19) /**< \brief ADC0 signal: DRV13 on PA19 mux O */
2495 #define PIN_PA20O_ADC0_DRV14 _L_(20) /**< \brief ADC0 signal: DRV14 on PA20 mux O */
2499 #define PIN_PA21O_ADC0_DRV15 _L_(21) /**< \brief ADC0 signal: DRV15 on PA21 mux O */
2503 #define PIN_PA22O_ADC0_DRV16 _L_(22) /**< \brief ADC0 signal: DRV16 on PA22 mux O */
2507 #define PIN_PA23O_ADC0_DRV17 _L_(23) /**< \brief ADC0 signal: DRV17 on PA23 mux O */
2511 #define PIN_PA27O_ADC0_DRV18 _L_(27) /**< \brief ADC0 signal: DRV18 on PA27 mux O */
2515 #define PIN_PA30O_ADC0_DRV19 _L_(30) /**< \brief ADC0 signal: DRV19 on PA30 mux O */
2519 #define PIN_PB02O_ADC0_DRV20 _L_(34) /**< \brief ADC0 signal: DRV20 on PB02 mux O */
2523 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */
2527 #define PIN_PB04O_ADC0_DRV22 _L_(36) /**< \brief ADC0 signal: DRV22 on PB04 mux O */
2531 #define PIN_PB05O_ADC0_DRV23 _L_(37) /**< \brief ADC0 signal: DRV23 on PB05 mux O */
2535 #define PIN_PB06O_ADC0_DRV24 _L_(38) /**< \brief ADC0 signal: DRV24 on PB06 mux O */
2539 #define PIN_PB07O_ADC0_DRV25 _L_(39) /**< \brief ADC0 signal: DRV25 on PB07 mux O */
2543 #define PIN_PB12O_ADC0_DRV26 _L_(44) /**< \brief ADC0 signal: DRV26 on PB12 mux O */
2547 #define PIN_PB13O_ADC0_DRV27 _L_(45) /**< \brief ADC0 signal: DRV27 on PB13 mux O */
2551 #define PIN_PB14O_ADC0_DRV28 _L_(46) /**< \brief ADC0 signal: DRV28 on PB14 mux O */
2555 #define PIN_PB15O_ADC0_DRV29 _L_(47) /**< \brief ADC0 signal: DRV29 on PB15 mux O */
2559 #define PIN_PB00O_ADC0_DRV30 _L_(32) /**< \brief ADC0 signal: DRV30 on PB00 mux O */
2563 #define PIN_PB01O_ADC0_DRV31 _L_(33) /**< \brief ADC0 signal: DRV31 on PB01 mux O */
2567 #define PIN_PA03B_ADC0_PTCXY0 _L_(3) /**< \brief ADC0 signal: PTCXY0 on PA03 mux B */
2571 #define PIN_PB08B_ADC0_PTCXY1 _L_(40) /**< \brief ADC0 signal: PTCXY1 on PB08 mux B */
2575 #define PIN_PB09B_ADC0_PTCXY2 _L_(41) /**< \brief ADC0 signal: PTCXY2 on PB09 mux B */
2579 #define PIN_PA04B_ADC0_PTCXY3 _L_(4) /**< \brief ADC0 signal: PTCXY3 on PA04 mux B */
2583 #define PIN_PA06B_ADC0_PTCXY4 _L_(6) /**< \brief ADC0 signal: PTCXY4 on PA06 mux B */
2587 #define PIN_PA07B_ADC0_PTCXY5 _L_(7) /**< \brief ADC0 signal: PTCXY5 on PA07 mux B */
2591 #define PIN_PA08B_ADC0_PTCXY6 _L_(8) /**< \brief ADC0 signal: PTCXY6 on PA08 mux B */
2595 #define PIN_PA09B_ADC0_PTCXY7 _L_(9) /**< \brief ADC0 signal: PTCXY7 on PA09 mux B */
2599 #define PIN_PA10B_ADC0_PTCXY8 _L_(10) /**< \brief ADC0 signal: PTCXY8 on PA10 mux B */
2603 #define PIN_PA11B_ADC0_PTCXY9 _L_(11) /**< \brief ADC0 signal: PTCXY9 on PA11 mux B */
2607 #define PIN_PA16B_ADC0_PTCXY10 _L_(16) /**< \brief ADC0 signal: PTCXY10 on PA16 mux B */
2611 #define PIN_PA17B_ADC0_PTCXY11 _L_(17) /**< \brief ADC0 signal: PTCXY11 on PA17 mux B */
2615 #define PIN_PA18B_ADC0_PTCXY12 _L_(18) /**< \brief ADC0 signal: PTCXY12 on PA18 mux B */
2619 #define PIN_PA19B_ADC0_PTCXY13 _L_(19) /**< \brief ADC0 signal: PTCXY13 on PA19 mux B */
2623 #define PIN_PA20B_ADC0_PTCXY14 _L_(20) /**< \brief ADC0 signal: PTCXY14 on PA20 mux B */
2627 #define PIN_PA21B_ADC0_PTCXY15 _L_(21) /**< \brief ADC0 signal: PTCXY15 on PA21 mux B */
2631 #define PIN_PA22B_ADC0_PTCXY16 _L_(22) /**< \brief ADC0 signal: PTCXY16 on PA22 mux B */
2635 #define PIN_PA23B_ADC0_PTCXY17 _L_(23) /**< \brief ADC0 signal: PTCXY17 on PA23 mux B */
2639 #define PIN_PA27B_ADC0_PTCXY18 _L_(27) /**< \brief ADC0 signal: PTCXY18 on PA27 mux B */
2643 #define PIN_PA30B_ADC0_PTCXY19 _L_(30) /**< \brief ADC0 signal: PTCXY19 on PA30 mux B */
2647 #define PIN_PB02B_ADC0_PTCXY20 _L_(34) /**< \brief ADC0 signal: PTCXY20 on PB02 mux B */
2651 #define PIN_PB03B_ADC0_PTCXY21 _L_(35) /**< \brief ADC0 signal: PTCXY21 on PB03 mux B */
2655 #define PIN_PB04B_ADC0_PTCXY22 _L_(36) /**< \brief ADC0 signal: PTCXY22 on PB04 mux B */
2659 #define PIN_PB05B_ADC0_PTCXY23 _L_(37) /**< \brief ADC0 signal: PTCXY23 on PB05 mux B */
2663 #define PIN_PB06B_ADC0_PTCXY24 _L_(38) /**< \brief ADC0 signal: PTCXY24 on PB06 mux B */
2667 #define PIN_PB07B_ADC0_PTCXY25 _L_(39) /**< \brief ADC0 signal: PTCXY25 on PB07 mux B */
2671 #define PIN_PB12B_ADC0_PTCXY26 _L_(44) /**< \brief ADC0 signal: PTCXY26 on PB12 mux B */
2675 #define PIN_PB13B_ADC0_PTCXY27 _L_(45) /**< \brief ADC0 signal: PTCXY27 on PB13 mux B */
2679 #define PIN_PB14B_ADC0_PTCXY28 _L_(46) /**< \brief ADC0 signal: PTCXY28 on PB14 mux B */
2683 #define PIN_PB15B_ADC0_PTCXY29 _L_(47) /**< \brief ADC0 signal: PTCXY29 on PB15 mux B */
2687 #define PIN_PB00B_ADC0_PTCXY30 _L_(32) /**< \brief ADC0 signal: PTCXY30 on PB00 mux B */
2691 #define PIN_PB01B_ADC0_PTCXY31 _L_(33) /**< \brief ADC0 signal: PTCXY31 on PB01 mux B */
2696 #define PIN_PB08B_ADC1_AIN0 _L_(40) /**< \brief ADC1 signal: AIN0 on PB08 mux B */
2700 #define PIN_PB09B_ADC1_AIN1 _L_(41) /**< \brief ADC1 signal: AIN1 on PB09 mux B */
2704 #define PIN_PA08B_ADC1_AIN2 _L_(8) /**< \brief ADC1 signal: AIN2 on PA08 mux B */
2708 #define PIN_PA09B_ADC1_AIN3 _L_(9) /**< \brief ADC1 signal: AIN3 on PA09 mux B */
2712 #define PIN_PC02B_ADC1_AIN4 _L_(66) /**< \brief ADC1 signal: AIN4 on PC02 mux B */
2716 #define PIN_PC03B_ADC1_AIN5 _L_(67) /**< \brief ADC1 signal: AIN5 on PC03 mux B */
2720 #define PIN_PB04B_ADC1_AIN6 _L_(36) /**< \brief ADC1 signal: AIN6 on PB04 mux B */
2724 #define PIN_PB05B_ADC1_AIN7 _L_(37) /**< \brief ADC1 signal: AIN7 on PB05 mux B */
2728 #define PIN_PB06B_ADC1_AIN8 _L_(38) /**< \brief ADC1 signal: AIN8 on PB06 mux B */
2732 #define PIN_PB07B_ADC1_AIN9 _L_(39) /**< \brief ADC1 signal: AIN9 on PB07 mux B */
2736 #define PIN_PC00B_ADC1_AIN10 _L_(64) /**< \brief ADC1 signal: AIN10 on PC00 mux B */
2740 #define PIN_PC01B_ADC1_AIN11 _L_(65) /**< \brief ADC1 signal: AIN11 on PC01 mux B */
2744 #define PIN_PC30B_ADC1_AIN12 _L_(94) /**< \brief ADC1 signal: AIN12 on PC30 mux B */
2748 #define PIN_PC31B_ADC1_AIN13 _L_(95) /**< \brief ADC1 signal: AIN13 on PC31 mux B */
2752 #define PIN_PD00B_ADC1_AIN14 _L_(96) /**< \brief ADC1 signal: AIN14 on PD00 mux B */
2756 #define PIN_PD01B_ADC1_AIN15 _L_(97) /**< \brief ADC1 signal: AIN15 on PD01 mux B */
2761 #define PIN_PA02B_DAC_VOUT0 _L_(2) /**< \brief DAC signal: VOUT0 on PA02 mux B */
2765 #define PIN_PA05B_DAC_VOUT1 _L_(5) /**< \brief DAC signal: VOUT1 on PA05 mux B */
2770 #define PIN_PA09J_I2S_FS0 _L_(9) /**< \brief I2S signal: FS0 on PA09 mux J */
2774 #define PIN_PA20J_I2S_FS0 _L_(20) /**< \brief I2S signal: FS0 on PA20 mux J */
2778 #define PIN_PA23J_I2S_FS1 _L_(23) /**< \brief I2S signal: FS1 on PA23 mux J */
2782 #define PIN_PB11J_I2S_FS1 _L_(43) /**< \brief I2S signal: FS1 on PB11 mux J */
2786 #define PIN_PA08J_I2S_MCK0 _L_(8) /**< \brief I2S signal: MCK0 on PA08 mux J */
2790 #define PIN_PB17J_I2S_MCK0 _L_(49) /**< \brief I2S signal: MCK0 on PB17 mux J */
2794 #define PIN_PB29J_I2S_MCK1 _L_(61) /**< \brief I2S signal: MCK1 on PB29 mux J */
2798 #define PIN_PB13J_I2S_MCK1 _L_(45) /**< \brief I2S signal: MCK1 on PB13 mux J */
2802 #define PIN_PA10J_I2S_SCK0 _L_(10) /**< \brief I2S signal: SCK0 on PA10 mux J */
2806 #define PIN_PB16J_I2S_SCK0 _L_(48) /**< \brief I2S signal: SCK0 on PB16 mux J */
2810 #define PIN_PB28J_I2S_SCK1 _L_(60) /**< \brief I2S signal: SCK1 on PB28 mux J */
2814 #define PIN_PB12J_I2S_SCK1 _L_(44) /**< \brief I2S signal: SCK1 on PB12 mux J */
2818 #define PIN_PA22J_I2S_SDI _L_(22) /**< \brief I2S signal: SDI on PA22 mux J */
2822 #define PIN_PB10J_I2S_SDI _L_(42) /**< \brief I2S signal: SDI on PB10 mux J */
2826 #define PIN_PA11J_I2S_SDO _L_(11) /**< \brief I2S signal: SDO on PA11 mux J */
2830 #define PIN_PA21J_I2S_SDO _L_(21) /**< \brief I2S signal: SDO on PA21 mux J */
2835 #define PIN_PA14K_PCC_CLK _L_(14) /**< \brief PCC signal: CLK on PA14 mux K */
2839 #define PIN_PA16K_PCC_DATA0 _L_(16) /**< \brief PCC signal: DATA0 on PA16 mux K */
2843 #define PIN_PA17K_PCC_DATA1 _L_(17) /**< \brief PCC signal: DATA1 on PA17 mux K */
2847 #define PIN_PA18K_PCC_DATA2 _L_(18) /**< \brief PCC signal: DATA2 on PA18 mux K */
2851 #define PIN_PA19K_PCC_DATA3 _L_(19) /**< \brief PCC signal: DATA3 on PA19 mux K */
2855 #define PIN_PA20K_PCC_DATA4 _L_(20) /**< \brief PCC signal: DATA4 on PA20 mux K */
2859 #define PIN_PA21K_PCC_DATA5 _L_(21) /**< \brief PCC signal: DATA5 on PA21 mux K */
2863 #define PIN_PA22K_PCC_DATA6 _L_(22) /**< \brief PCC signal: DATA6 on PA22 mux K */
2867 #define PIN_PA23K_PCC_DATA7 _L_(23) /**< \brief PCC signal: DATA7 on PA23 mux K */
2871 #define PIN_PB14K_PCC_DATA8 _L_(46) /**< \brief PCC signal: DATA8 on PB14 mux K */
2875 #define PIN_PB15K_PCC_DATA9 _L_(47) /**< \brief PCC signal: DATA9 on PB15 mux K */
2879 #define PIN_PC12K_PCC_DATA10 _L_(76) /**< \brief PCC signal: DATA10 on PC12 mux K */
2883 #define PIN_PC13K_PCC_DATA11 _L_(77) /**< \brief PCC signal: DATA11 on PC13 mux K */
2887 #define PIN_PC14K_PCC_DATA12 _L_(78) /**< \brief PCC signal: DATA12 on PC14 mux K */
2891 #define PIN_PC15K_PCC_DATA13 _L_(79) /**< \brief PCC signal: DATA13 on PC15 mux K */
2895 #define PIN_PA12K_PCC_DEN1 _L_(12) /**< \brief PCC signal: DEN1 on PA12 mux K */
2899 #define PIN_PA13K_PCC_DEN2 _L_(13) /**< \brief PCC signal: DEN2 on PA13 mux K */
2904 #define PIN_PA06I_SDHC0_SDCD _L_(6) /**< \brief SDHC0 signal: SDCD on PA06 mux I */
2908 #define PIN_PA12I_SDHC0_SDCD _L_(12) /**< \brief SDHC0 signal: SDCD on PA12 mux I */
2912 #define PIN_PB12I_SDHC0_SDCD _L_(44) /**< \brief SDHC0 signal: SDCD on PB12 mux I */
2916 #define PIN_PC06I_SDHC0_SDCD _L_(70) /**< \brief SDHC0 signal: SDCD on PC06 mux I */
2920 #define PIN_PB11I_SDHC0_SDCK _L_(43) /**< \brief SDHC0 signal: SDCK on PB11 mux I */
2924 #define PIN_PA08I_SDHC0_SDCMD _L_(8) /**< \brief SDHC0 signal: SDCMD on PA08 mux I */
2928 #define PIN_PA09I_SDHC0_SDDAT0 _L_(9) /**< \brief SDHC0 signal: SDDAT0 on PA09 mux I */
2932 #define PIN_PA10I_SDHC0_SDDAT1 _L_(10) /**< \brief SDHC0 signal: SDDAT1 on PA10 mux I */
2936 #define PIN_PA11I_SDHC0_SDDAT2 _L_(11) /**< \brief SDHC0 signal: SDDAT2 on PA11 mux I */
2940 #define PIN_PB10I_SDHC0_SDDAT3 _L_(42) /**< \brief SDHC0 signal: SDDAT3 on PB10 mux I */
2944 #define PIN_PA07I_SDHC0_SDWP _L_(7) /**< \brief SDHC0 signal: SDWP on PA07 mux I */
2948 #define PIN_PA13I_SDHC0_SDWP _L_(13) /**< \brief SDHC0 signal: SDWP on PA13 mux I */
2952 #define PIN_PB13I_SDHC0_SDWP _L_(45) /**< \brief SDHC0 signal: SDWP on PB13 mux I */
2956 #define PIN_PC07I_SDHC0_SDWP _L_(71) /**< \brief SDHC0 signal: SDWP on PC07 mux I */
2961 #define PIN_PB16I_SDHC1_SDCD _L_(48) /**< \brief SDHC1 signal: SDCD on PB16 mux I */
2965 #define PIN_PC20I_SDHC1_SDCD _L_(84) /**< \brief SDHC1 signal: SDCD on PC20 mux I */
2969 #define PIN_PD20I_SDHC1_SDCD _L_(116) /**< \brief SDHC1 signal: SDCD on PD20 mux I */
2973 #define PIN_PA21I_SDHC1_SDCK _L_(21) /**< \brief SDHC1 signal: SDCK on PA21 mux I */
2977 #define PIN_PA20I_SDHC1_SDCMD _L_(20) /**< \brief SDHC1 signal: SDCMD on PA20 mux I */
2981 #define PIN_PB18I_SDHC1_SDDAT0 _L_(50) /**< \brief SDHC1 signal: SDDAT0 on PB18 mux I */
2985 #define PIN_PB19I_SDHC1_SDDAT1 _L_(51) /**< \brief SDHC1 signal: SDDAT1 on PB19 mux I */
2989 #define PIN_PB20I_SDHC1_SDDAT2 _L_(52) /**< \brief SDHC1 signal: SDDAT2 on PB20 mux I */
2993 #define PIN_PB21I_SDHC1_SDDAT3 _L_(53) /**< \brief SDHC1 signal: SDDAT3 on PB21 mux I */
2997 #define PIN_PB17I_SDHC1_SDWP _L_(49) /**< \brief SDHC1 signal: SDWP on PB17 mux I */
3001 #define PIN_PC21I_SDHC1_SDWP _L_(85) /**< \brief SDHC1 signal: SDWP on PC21 mux I */
3005 #define PIN_PD21I_SDHC1_SDWP _L_(117) /**< \brief SDHC1 signal: SDWP on PD21 mux I */