483 am_get_pwrctrl(struct am_pwr_s *pwr_ctrl, uint32_t ePeripheral)  in am_get_pwrctrl()  argument
485     if ( pwr_ctrl == NULL || ePeripheral >= AM_HAL_PWRCTRL_PERIPH_MAX )  in am_get_pwrctrl()
490     *pwr_ctrl = am_hal_pwrctrl_peripheral_control[ePeripheral];  in am_get_pwrctrl()
506 am_get_pwrctrl(struct am_pwr_s *pwr_ctrl, uint32_t ePeripheral)  in am_get_pwrctrl()  argument
510     if (pwr_ctrl == NULL || ePeripheral >= AM_HAL_PWRCTRL_PERIPH_MAX)  in am_get_pwrctrl()
517         pwr_ctrl->ui32PwrEnRegAddr = AM_REGADDR(PWRCTRL, DEVPWREN);  in am_get_pwrctrl()
518         pwr_ctrl->ui32PwrStatReqAddr = AM_REGADDR(PWRCTRL, DEVPWRSTATUS);  in am_get_pwrctrl()
519         pwr_ctrl->ui32PeriphEnable = 1 << ePeripheral;  in am_get_pwrctrl()
520         pwr_ctrl->ui32PeriphStatus = 1 << ePeripheral;  in am_get_pwrctrl()
530         pwr_ctrl->ui32PwrEnRegAddr =  AM_REGADDR(PWRCTRL, AUDSSPWREN);  in am_get_pwrctrl()
531         pwr_ctrl->ui32PwrStatReqAddr = AM_REGADDR(PWRCTRL, AUDSSPWRSTATUS);  in am_get_pwrctrl()
532         pwr_ctrl->ui32PeriphEnable = 1 << shift_pos;  in am_get_pwrctrl()
533         pwr_ctrl->ui32PeriphStatus = 1 << shift_pos;  in am_get_pwrctrl()
1819     struct am_pwr_s pwr_ctrl;  in am_hal_pwrctrl_periph_enable()  local
1821     ui32Status = am_get_pwrctrl(&pwr_ctrl, ePeripheral);  in am_hal_pwrctrl_periph_enable()
1828     if ( AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable )  in am_hal_pwrctrl_periph_enable()
1853     AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) |=  in am_hal_pwrctrl_periph_enable()
1854         pwr_ctrl.ui32PeriphEnable;  in am_hal_pwrctrl_periph_enable()
1858                                               pwr_ctrl.ui32PwrStatReqAddr,  in am_hal_pwrctrl_periph_enable()
1859                                               pwr_ctrl.ui32PeriphStatus,  in am_hal_pwrctrl_periph_enable()
1860                                               pwr_ctrl.ui32PeriphStatus,  in am_hal_pwrctrl_periph_enable()
1905     if ( (AM_REGVAL(pwr_ctrl.ui32PwrStatReqAddr) &  in am_hal_pwrctrl_periph_enable()
1906         pwr_ctrl.ui32PeriphStatus) != 0)  in am_hal_pwrctrl_periph_enable()
1930     struct am_pwr_s pwr_ctrl;  in pwrctrl_periph_disable_msk_check()  local
1932     ui32Status = am_get_pwrctrl(&pwr_ctrl, ePeripheral);  in pwrctrl_periph_disable_msk_check()
1939     switch (pwr_ctrl.ui32PeriphStatus)  in pwrctrl_periph_disable_msk_check()
1942             if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_HCPA_DEVPWREN_MASK) != 0) &&  in pwrctrl_periph_disable_msk_check()
1943                 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0))  in pwrctrl_periph_disable_msk_check()
1950             if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_HCPB_DEVPWREN_MASK) != 0) &&  in pwrctrl_periph_disable_msk_check()
1951                 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0))  in pwrctrl_periph_disable_msk_check()
1958             if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_HCPC_DEVPWREN_MASK) != 0) &&  in pwrctrl_periph_disable_msk_check()
1959                 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0))  in pwrctrl_periph_disable_msk_check()
1966             if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_MSPI_DEVPWREN_MASK) != 0) &&  in pwrctrl_periph_disable_msk_check()
1967                 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0))  in pwrctrl_periph_disable_msk_check()
1974             if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_AUD_DEVPWREN_MASK) != 0) &&  in pwrctrl_periph_disable_msk_check()
1975                 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0))  in pwrctrl_periph_disable_msk_check()
1998     struct am_pwr_s pwr_ctrl;  in am_hal_pwrctrl_periph_disable()  local
2000     ui32Status = am_get_pwrctrl(&pwr_ctrl, ePeripheral);  in am_hal_pwrctrl_periph_disable()
2007     if ( !(AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) )  in am_hal_pwrctrl_periph_disable()
2050     AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) &= ~pwr_ctrl.ui32PeriphEnable;  in am_hal_pwrctrl_periph_disable()
2058                                               pwr_ctrl.ui32PwrStatReqAddr,  in am_hal_pwrctrl_periph_disable()
2059                                               pwr_ctrl.ui32PeriphStatus,  in am_hal_pwrctrl_periph_disable()
2060                                               pwr_ctrl.ui32PeriphStatus,  in am_hal_pwrctrl_periph_disable()
2088     struct am_pwr_s pwr_ctrl;  in am_hal_pwrctrl_periph_enabled()  local
2102     ui32Status = am_get_pwrctrl(&pwr_ctrl, ePeripheral);  in am_hal_pwrctrl_periph_enabled()
2109     *bEnabled = ((AM_REGVAL(pwr_ctrl.ui32PwrStatReqAddr) &  in am_hal_pwrctrl_periph_enabled()
2110                   pwr_ctrl.ui32PeriphStatus) != 0);  in am_hal_pwrctrl_periph_enabled()