476     ui32GPCfgVal = (AM_REGVAL(ui32GPCfgAddr) & ui32GPCfgMask) >> ui32GPCfgShft;  in am_hal_gpio_pinconfig_get()
477     ui32PadVal = (AM_REGVAL(ui32PadregAddr) & ui32PadMask) >> ui32PadShft;  in am_hal_gpio_pinconfig_get()
478     ui32AltVal = (AM_REGVAL(ui32AltpadAddr) & ui32PadMask) >> ui32PadShft;  in am_hal_gpio_pinconfig_get()
803     AM_REGVAL(ui32PadregAddr)  = (AM_REGVAL(ui32PadregAddr) & ui32PadClearMask)   | ui32Padreg;  in am_hal_gpio_pinconfig()
804     AM_REGVAL(ui32GPCfgAddr)   = (AM_REGVAL(ui32GPCfgAddr)  & ui32GPCfgClearMask) | ui32GPCfg;  in am_hal_gpio_pinconfig()
805     AM_REGVAL(ui32AltpadAddr)  = (AM_REGVAL(ui32AltpadAddr) & ui32PadClearMask)   | ui32AltPadCfg;  in am_hal_gpio_pinconfig()
957     ui32Regval    = AM_REGVAL( AM_REGADDR(GPIO, PADREGA) + (ui32Pin & ~0x3) );  in am_hal_gpio_state_read()
981             ui32ReadValue = AM_REGVAL(AM_REGADDR(GPIO, RDA) + ui32BaseAddr);  in am_hal_gpio_state_read()
985             ui32ReadValue = AM_REGVAL(AM_REGADDR(GPIO, WTA) + ui32BaseAddr);  in am_hal_gpio_state_read()
989             ui32ReadValue = AM_REGVAL(AM_REGADDR(GPIO, ENA) + ui32BaseAddr);  in am_hal_gpio_state_read()
1044     ui32Regval    = AM_REGVAL( AM_REGADDR(GPIO, PADREGA) + (ui32Pin & ~0x3) );  in am_hal_gpio_state_write()
1061             AM_REGVAL(AM_REGADDR(GPIO, WTSA) + ui32Off) = ui32Mask;  in am_hal_gpio_state_write()
1064             AM_REGVAL(AM_REGADDR(GPIO, WTCA) + ui32Off) = ui32Mask;  in am_hal_gpio_state_write()
1067             AM_REGVAL(AM_REGADDR(GPIO, WTA) + ui32Off) ^= ui32Mask;  in am_hal_gpio_state_write()
1070             AM_REGVAL(AM_REGADDR(GPIO, ENSA) + ui32Off) = ui32Mask;  in am_hal_gpio_state_write()
1073             AM_REGVAL(AM_REGADDR(GPIO, ENCA) + ui32Off) = ui32Mask;  in am_hal_gpio_state_write()
1076             AM_REGVAL(AM_REGADDR(GPIO, ENCA) + ui32Off) ^= ui32Mask;  in am_hal_gpio_state_write()
1456     ui32Regval    = AM_REGVAL( AM_REGADDR(GPIO, PADREGA) + (ui32Pin & ~0x3) );  in am_hal_gpio_isinput()
1481     ui32Padval   = AM_REGVAL( AM_REGADDR(GPIO, PADREGA) + (ui32Pin & ~0x3) );  in am_hal_gpio_isgpio()
1494     ui32Cfgval = AM_REGVAL( AM_REGADDR(GPIO, CFGA) + ((ui32Pin >> 1) & ~0x3) );  in am_hal_gpio_isgpio()