Lines Matching refs:AM_REGVAL

797                 ui32Val |= (AM_REGVAL((uint32_t)pAddr) & ~ui32Mask);  in am_hal_util_write_and_wait()
1828 if ( AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable ) in am_hal_pwrctrl_periph_enable()
1853 AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) |= in am_hal_pwrctrl_periph_enable()
1905 if ( (AM_REGVAL(pwr_ctrl.ui32PwrStatReqAddr) & in am_hal_pwrctrl_periph_enable()
1942 if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_HCPA_DEVPWREN_MASK) != 0) && in pwrctrl_periph_disable_msk_check()
1943 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0)) in pwrctrl_periph_disable_msk_check()
1950 if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_HCPB_DEVPWREN_MASK) != 0) && in pwrctrl_periph_disable_msk_check()
1951 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0)) in pwrctrl_periph_disable_msk_check()
1958 if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_HCPC_DEVPWREN_MASK) != 0) && in pwrctrl_periph_disable_msk_check()
1959 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0)) in pwrctrl_periph_disable_msk_check()
1966 if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_MSPI_DEVPWREN_MASK) != 0) && in pwrctrl_periph_disable_msk_check()
1967 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0)) in pwrctrl_periph_disable_msk_check()
1974 if (((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & PWRCTRL_AUD_DEVPWREN_MASK) != 0) && in pwrctrl_periph_disable_msk_check()
1975 ((AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) == 0)) in pwrctrl_periph_disable_msk_check()
2007 if ( !(AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) & pwr_ctrl.ui32PeriphEnable) ) in am_hal_pwrctrl_periph_disable()
2050 AM_REGVAL(pwr_ctrl.ui32PwrEnRegAddr) &= ~pwr_ctrl.ui32PeriphEnable; in am_hal_pwrctrl_periph_disable()
2109 *bEnabled = ((AM_REGVAL(pwr_ctrl.ui32PwrStatReqAddr) & in am_hal_pwrctrl_periph_enabled()