452                 GPIO->MCUN0INT0EN &= ~pGpioIntMask->U.Msk[0];  in am_hal_gpio_interrupt_control()
453                 GPIO->MCUN0INT1EN &= ~pGpioIntMask->U.Msk[1];  in am_hal_gpio_interrupt_control()
454                 GPIO->MCUN0INT2EN &= ~pGpioIntMask->U.Msk[2];  in am_hal_gpio_interrupt_control()
455                 GPIO->MCUN0INT3EN &= ~pGpioIntMask->U.Msk[3];  in am_hal_gpio_interrupt_control()
459                 GPIO->MCUN1INT0EN &= ~pGpioIntMask->U.Msk[0];  in am_hal_gpio_interrupt_control()
460                 GPIO->MCUN1INT1EN &= ~pGpioIntMask->U.Msk[1];  in am_hal_gpio_interrupt_control()
461                 GPIO->MCUN1INT2EN &= ~pGpioIntMask->U.Msk[2];  in am_hal_gpio_interrupt_control()
462                 GPIO->MCUN1INT3EN &= ~pGpioIntMask->U.Msk[3];  in am_hal_gpio_interrupt_control()
469                 GPIO->MCUN0INT0EN |= pGpioIntMask->U.Msk[0];  in am_hal_gpio_interrupt_control()
470                 GPIO->MCUN0INT1EN |= pGpioIntMask->U.Msk[1];  in am_hal_gpio_interrupt_control()
471                 GPIO->MCUN0INT2EN |= pGpioIntMask->U.Msk[2];  in am_hal_gpio_interrupt_control()
472                 GPIO->MCUN0INT3EN |= pGpioIntMask->U.Msk[3];  in am_hal_gpio_interrupt_control()
476                 GPIO->MCUN1INT0EN |= pGpioIntMask->U.Msk[0];  in am_hal_gpio_interrupt_control()
477                 GPIO->MCUN1INT1EN |= pGpioIntMask->U.Msk[1];  in am_hal_gpio_interrupt_control()
478                 GPIO->MCUN1INT2EN |= pGpioIntMask->U.Msk[2];  in am_hal_gpio_interrupt_control()
479                 GPIO->MCUN1INT3EN |= pGpioIntMask->U.Msk[3];  in am_hal_gpio_interrupt_control()
533         pGpioIntMask->U.Msk[0] = GPIO->MCUN0INT0STAT & ui32Mask[0];  in am_hal_gpio_interrupt_status_get()
534         pGpioIntMask->U.Msk[1] = GPIO->MCUN0INT1STAT & ui32Mask[1];  in am_hal_gpio_interrupt_status_get()
535         pGpioIntMask->U.Msk[2] = GPIO->MCUN0INT2STAT & ui32Mask[2];  in am_hal_gpio_interrupt_status_get()
536         pGpioIntMask->U.Msk[3] = GPIO->MCUN0INT3STAT & ui32Mask[3];  in am_hal_gpio_interrupt_status_get()
547         pGpioIntMask->U.Msk[0] = GPIO->MCUN1INT0STAT & ui32Mask[0];  in am_hal_gpio_interrupt_status_get()
548         pGpioIntMask->U.Msk[1] = GPIO->MCUN1INT1STAT & ui32Mask[1];  in am_hal_gpio_interrupt_status_get()
549         pGpioIntMask->U.Msk[2] = GPIO->MCUN1INT2STAT & ui32Mask[2];  in am_hal_gpio_interrupt_status_get()
550         pGpioIntMask->U.Msk[3] = GPIO->MCUN1INT3STAT & ui32Mask[3];  in am_hal_gpio_interrupt_status_get()
582     if ( pGpioIntMask->U.Msk[AM_HAL_GPIO_NUMWORDS - 1] &  in am_hal_gpio_interrupt_clear()
595         GPIO->MCUN0INT0CLR = pGpioIntMask->U.Msk[0];  in am_hal_gpio_interrupt_clear()
596         GPIO->MCUN0INT1CLR = pGpioIntMask->U.Msk[1];  in am_hal_gpio_interrupt_clear()
597         GPIO->MCUN0INT2CLR = pGpioIntMask->U.Msk[2];  in am_hal_gpio_interrupt_clear()
598         GPIO->MCUN0INT3CLR = pGpioIntMask->U.Msk[3];  in am_hal_gpio_interrupt_clear()
599         GPIO->MCUN1INT0CLR = pGpioIntMask->U.Msk[0];  in am_hal_gpio_interrupt_clear()
600         GPIO->MCUN1INT1CLR = pGpioIntMask->U.Msk[1];  in am_hal_gpio_interrupt_clear()
601         GPIO->MCUN1INT2CLR = pGpioIntMask->U.Msk[2];  in am_hal_gpio_interrupt_clear()
602         GPIO->MCUN1INT3CLR = pGpioIntMask->U.Msk[3];  in am_hal_gpio_interrupt_clear()
611         GPIO->MCUN0INT0CLR = pGpioIntMask->U.Msk[0];  in am_hal_gpio_interrupt_clear()
612         GPIO->MCUN0INT1CLR = pGpioIntMask->U.Msk[1];  in am_hal_gpio_interrupt_clear()
613         GPIO->MCUN0INT2CLR = pGpioIntMask->U.Msk[2];  in am_hal_gpio_interrupt_clear()
614         GPIO->MCUN0INT3CLR = pGpioIntMask->U.Msk[3];  in am_hal_gpio_interrupt_clear()
623         GPIO->MCUN1INT0CLR = pGpioIntMask->U.Msk[0];  in am_hal_gpio_interrupt_clear()
624         GPIO->MCUN1INT1CLR = pGpioIntMask->U.Msk[1];  in am_hal_gpio_interrupt_clear()
625         GPIO->MCUN1INT2CLR = pGpioIntMask->U.Msk[2];  in am_hal_gpio_interrupt_clear()
626         GPIO->MCUN1INT3CLR = pGpioIntMask->U.Msk[3];  in am_hal_gpio_interrupt_clear()