Lines Matching refs:mtMode
43 int mtMode; member
75 states[spi_num].mtMode = 0; in MXC_SPI_RevA1_Init()
288 int MXC_SPI_RevA1_SetMTMode(mxc_spi_reva_regs_t *spi, int mtMode) in MXC_SPI_RevA1_SetMTMode() argument
292 if ((mtMode != 0) && (mtMode != 1)) { in MXC_SPI_RevA1_SetMTMode()
296 if (states[spi_num].mtMode == 1) { in MXC_SPI_RevA1_SetMTMode()
297 if (mtMode == 0) { in MXC_SPI_RevA1_SetMTMode()
308 } else if (mtMode == 1) { in MXC_SPI_RevA1_SetMTMode()
313 states[spi_num].mtMode = mtMode; in MXC_SPI_RevA1_SetMTMode()
322 return states[spi_num].mtMode; in MXC_SPI_RevA1_GetMTMode()
495 if (states[spi_num].mtMode == 1) { in MXC_SPI_RevA1_AbortTransmission()
953 if ((states[spi_num].mtMode == 0) || in MXC_SPI_RevA1_MasterTransactionDMA()
954 ((states[spi_num].mtMode == 1) && (states[spi_num].mtFirstTrans == 1))) { in MXC_SPI_RevA1_MasterTransactionDMA()
1161 if ((states[spi_num].mtMode == 0) || in MXC_SPI_RevA1_SlaveTransactionDMA()
1162 ((states[spi_num].mtMode == 1) && (states[spi_num].mtFirstTrans == 1))) { in MXC_SPI_RevA1_SlaveTransactionDMA()
1304 if (states[i].mtMode == 0) { in MXC_SPI_RevA1_DMACallback()