43 int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves,  in MXC_SPI_Init()  argument
56     switch (MXC_SPI_GET_IDX(spi)) {  in MXC_SPI_Init()
83     return MXC_SPI_RevA1_Init((mxc_spi_reva_regs_t *)spi, masterMode, quadModeUsed, numSlaves,  in MXC_SPI_Init()
88 int MXC_SPI_Shutdown(mxc_spi_regs_t *spi)  in MXC_SPI_Shutdown()  argument
90     MXC_SPI_RevA1_Shutdown((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_Shutdown()
92     switch (MXC_SPI_GET_IDX(spi)) {  in MXC_SPI_Shutdown()
113 int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi)  in MXC_SPI_ReadyForSleep()  argument
115     return MXC_SPI_RevA1_ReadyForSleep((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_ReadyForSleep()
119 int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi)  in MXC_SPI_GetPeripheralClock()  argument
121     if (MXC_SPI_GET_IDX(spi) == 3) {  in MXC_SPI_GetPeripheralClock()
123     } else if (MXC_SPI_GET_IDX(spi) != -1) {  in MXC_SPI_GetPeripheralClock()
132 int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz)  in MXC_SPI_SetFrequency()  argument
134     return MXC_SPI_RevA1_SetFrequency((mxc_spi_reva_regs_t *)spi, hz);  in MXC_SPI_SetFrequency()
138 unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi)  in MXC_SPI_GetFrequency()  argument
140     return MXC_SPI_RevA1_GetFrequency((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetFrequency()
144 int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize)  in MXC_SPI_SetDataSize()  argument
146     return MXC_SPI_RevA1_SetDataSize((mxc_spi_reva_regs_t *)spi, dataSize);  in MXC_SPI_SetDataSize()
150 int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi)  in MXC_SPI_GetDataSize()  argument
152     return MXC_SPI_RevA1_GetDataSize((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetDataSize()
159 int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx)  in MXC_SPI_SetSlave()  argument
161     return MXC_SPI_RevA1_SetSlave((mxc_spi_reva_regs_t *)spi, ssIdx);  in MXC_SPI_SetSlave()
165 int MXC_SPI_GetSlave(mxc_spi_regs_t *spi)  in MXC_SPI_GetSlave()  argument
167     int spi_num = MXC_SPI_GET_IDX((mxc_spi_regs_t *)spi);  in MXC_SPI_GetSlave()
170     int slvSel = (spi->ctrl0 & MXC_F_SPI_CTRL0_SS_SEL) >> MXC_F_SPI_CTRL0_SS_SEL_POS;  in MXC_SPI_GetSlave()
181 int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth)  in MXC_SPI_SetWidth()  argument
183     return MXC_SPI_RevA1_SetWidth((mxc_spi_reva_regs_t *)spi, spiWidth);  in MXC_SPI_SetWidth()
187 mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi)  in MXC_SPI_GetWidth()  argument
189     return MXC_SPI_RevA1_GetWidth((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetWidth()
193 int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode)  in MXC_SPI_SetMode()  argument
195     return MXC_SPI_RevA1_SetMode((mxc_spi_reva_regs_t *)spi, (mxc_spi_reva_mode_t)spiMode);  in MXC_SPI_SetMode()
199 mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi)  in MXC_SPI_GetMode()  argument
201     return (mxc_spi_mode_t)MXC_SPI_RevA1_GetMode((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetMode()
205 int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi)  in MXC_SPI_StartTransmission()  argument
207     return MXC_SPI_RevA1_StartTransmission((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_StartTransmission()
211 int MXC_SPI_GetActive(mxc_spi_regs_t *spi)  in MXC_SPI_GetActive()  argument
213     return MXC_SPI_RevA1_GetActive((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetActive()
217 int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi)  in MXC_SPI_AbortTransmission()  argument
219     return MXC_SPI_RevA1_AbortTransmission((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_AbortTransmission()
223 unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len)  in MXC_SPI_ReadRXFIFO()  argument
225     return MXC_SPI_RevA1_ReadRXFIFO((mxc_spi_reva_regs_t *)spi, bytes, len);  in MXC_SPI_ReadRXFIFO()
229 unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi)  in MXC_SPI_GetRXFIFOAvailable()  argument
231     return MXC_SPI_RevA1_GetRXFIFOAvailable((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetRXFIFOAvailable()
235 unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len)  in MXC_SPI_WriteTXFIFO()  argument
237     return MXC_SPI_RevA1_WriteTXFIFO((mxc_spi_reva_regs_t *)spi, bytes, len);  in MXC_SPI_WriteTXFIFO()
241 unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi)  in MXC_SPI_GetTXFIFOAvailable()  argument
243     return MXC_SPI_RevA1_GetTXFIFOAvailable((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetTXFIFOAvailable()
247 void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi)  in MXC_SPI_ClearRXFIFO()  argument
249     MXC_SPI_RevA1_ClearRXFIFO((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_ClearRXFIFO()
253 void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi)  in MXC_SPI_ClearTXFIFO()  argument
255     MXC_SPI_RevA1_ClearTXFIFO((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_ClearTXFIFO()
259 int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes)  in MXC_SPI_SetRXThreshold()  argument
261     return MXC_SPI_RevA1_SetRXThreshold((mxc_spi_reva_regs_t *)spi, numBytes);  in MXC_SPI_SetRXThreshold()
265 unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi)  in MXC_SPI_GetRXThreshold()  argument
267     return MXC_SPI_RevA1_GetRXThreshold((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetRXThreshold()
271 int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes)  in MXC_SPI_SetTXThreshold()  argument
273     return MXC_SPI_RevA1_SetTXThreshold((mxc_spi_reva_regs_t *)spi, numBytes);  in MXC_SPI_SetTXThreshold()
277 unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi)  in MXC_SPI_GetTXThreshold()  argument
279     return MXC_SPI_RevA1_GetTXThreshold((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetTXThreshold()
283 unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi)  in MXC_SPI_GetFlags()  argument
285     return MXC_SPI_RevA1_GetFlags((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_GetFlags()
289 void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi)  in MXC_SPI_ClearFlags()  argument
291     MXC_SPI_RevA1_ClearFlags((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_ClearFlags()
295 void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int mask)  in MXC_SPI_EnableInt()  argument
297     MXC_SPI_RevA1_EnableInt((mxc_spi_reva_regs_t *)spi, mask);  in MXC_SPI_EnableInt()
301 void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int mask)  in MXC_SPI_DisableInt()  argument
303     MXC_SPI_RevA1_DisableInt((mxc_spi_reva_regs_t *)spi, mask);  in MXC_SPI_DisableInt()
326     switch (MXC_SPI_GET_IDX(req->spi)) {  in MXC_SPI_MasterTransactionDMA()
367     switch (MXC_SPI_GET_IDX(req->spi)) {  in MXC_SPI_SlaveTransactionDMA()
392 int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData)  in MXC_SPI_SetDefaultTXData()  argument
394     return MXC_SPI_RevA1_SetDefaultTXData((mxc_spi_reva_regs_t *)spi, defaultTXData);  in MXC_SPI_SetDefaultTXData()
398 void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi)  in MXC_SPI_AbortAsync()  argument
400     MXC_SPI_RevA1_AbortAsync((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_AbortAsync()
404 void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi)  in MXC_SPI_AsyncHandler()  argument
406     MXC_SPI_RevA1_AsyncHandler((mxc_spi_reva_regs_t *)spi);  in MXC_SPI_AsyncHandler()
409 void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state)  in MXC_SPI_HWSSControl()  argument
411     MXC_SPI_RevA1_HWSSControl((mxc_spi_reva_regs_t *)spi, state);  in MXC_SPI_HWSSControl()