62         MXC_SETFIELD(i2s->ctrl1ch0, MXC_F_I2S_REVA_CTRL1CH0_BITS_WORD,  in configure_data_sizes()
65         MXC_SETFIELD(i2s->ctrl1ch0, MXC_F_I2S_REVA_CTRL1CH0_BITS_WORD,  in configure_data_sizes()
72         MXC_SETFIELD(i2s->ctrl1ch0, MXC_F_I2S_REVA_CTRL1CH0_SMP_SIZE,  in configure_data_sizes()
75         MXC_SETFIELD(i2s->ctrl1ch0, MXC_F_I2S_REVA_CTRL1CH0_SMP_SIZE,  in configure_data_sizes()
130     i2s->ctrl1ch0 = 0x00;  in MXC_I2S_RevA_Shutdown()
159     i2s->ctrl1ch0 &= ~MXC_F_I2S_REVA_CTRL1CH0_BITS_WORD;  in MXC_I2S_RevA_ConfigData()
160     i2s->ctrl1ch0 &= ~MXC_F_I2S_REVA_CTRL1CH0_SMP_SIZE;  in MXC_I2S_RevA_ConfigData()
164     MXC_SETFIELD(i2s->ctrl1ch0, MXC_F_I2S_REVA_CTRL1CH0_ADJUST,  in MXC_I2S_RevA_ConfigData()
249     i2s->ctrl1ch0 &= ~MXC_F_I2S_REVA_CTRL1CH0_EN;  in MXC_I2S_RevA_SetFrequency()
254     i2s->ctrl1ch0 |= ((uint32_t)clkdiv) << MXC_F_I2S_REVA_CTRL1CH0_CLKDIV_POS;  in MXC_I2S_RevA_SetFrequency()
256     i2s->ctrl1ch0 |= MXC_F_I2S_REVA_CTRL1CH0_EN;  in MXC_I2S_RevA_SetFrequency()
271     i2s->ctrl1ch0 &= ~MXC_F_I2S_REVA_CTRL1CH0_EN;  in MXC_I2S_RevA_SetSampleRate()
272     i2s->ctrl1ch0 |= ((uint32_t)clk_div) << MXC_F_I2S_REVA_CTRL1CH0_CLKDIV_POS;  in MXC_I2S_RevA_SetSampleRate()
273     i2s->ctrl1ch0 |= MXC_F_I2S_REVA_CTRL1CH0_EN;  in MXC_I2S_RevA_SetSampleRate()
284     clk_div = (i2s->ctrl1ch0 & MXC_F_I2S_REVA_CTRL1CH0_CLKDIV) >>  in MXC_I2S_RevA_GetSampleRate()
474     i2s->ctrl1ch0 &= ~MXC_F_I2S_REVA_CTRL1CH0_EN; // Disable I2S while it's being configured  in MXC_I2S_RevA_Transaction()
513     i2s->ctrl1ch0 |= MXC_F_I2S_REVA_CTRL1CH0_EN; // Enable I2S RX/TX  in MXC_I2S_RevA_Transaction()
537     i2s->ctrl1ch0 &= ~MXC_F_I2S_REVA_CTRL1CH0_EN; // Disable I2S while it's being configured  in MXC_I2S_RevA_TransactionAsync()
583     i2s->ctrl1ch0 |= MXC_F_I2S_REVA_CTRL1CH0_EN; // Enable I2S RX/TX  in MXC_I2S_RevA_TransactionAsync()