Lines Matching +full:- +full:r
8 * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
10 * SPDX-License-Identifier: Apache-2.0
16 * www.apache.org/licenses/LICENSE-2.0
28 CMSIS-DSP to build on a core (M0 for instance) or a host where
55 to CMSIS-DSP and only to allow the use of this library from other
58 MSVC is not going to be used to cross-compile to ARM. So, having a MSVC
82 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); in __SSAT()
83 const int32_t min = -1 - max ; in __SSAT()
100 const uint32_t max = ((1U << sat) - 1U); in __USAT()
127 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
190 a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
202 a -= (q31_t) (((q63_t) x * y) >> 32)
249 q31_t r, s, t, u; in __QADD8() local
251 r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; in __QADD8()
256 return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); in __QADD8()
267 q31_t r, s, t, u; in __QSUB8() local
269 r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; in __QSUB8()
270 s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; in __QSUB8()
271 t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; in __QSUB8()
272 u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; in __QSUB8()
274 return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); in __QSUB8()
285 /* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass… in __QADD16()
286 q31_t r = 0, s = 0; in __QADD16() local
288 r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; in __QADD16()
291 return ((uint32_t)((s << 16) | (r ))); in __QADD16()
302 q31_t r, s; in __SHADD16() local
304 r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; in __SHADD16()
307 return ((uint32_t)((s << 16) | (r ))); in __SHADD16()
318 q31_t r, s; in __QSUB16() local
320 r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; in __QSUB16()
321 s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; in __QSUB16()
323 return ((uint32_t)((s << 16) | (r ))); in __QSUB16()
334 q31_t r, s; in __SHSUB16() local
336 r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; in __SHSUB16()
337 s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; in __SHSUB16()
339 return ((uint32_t)((s << 16) | (r ))); in __SHSUB16()
350 q31_t r, s; in __QASX() local
352 r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; in __QASX()
355 return ((uint32_t)((s << 16) | (r ))); in __QASX()
366 q31_t r, s; in __SHASX() local
368 r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; in __SHASX()
371 return ((uint32_t)((s << 16) | (r ))); in __SHASX()
382 q31_t r, s; in __QSAX() local
384 r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; in __QSAX()
385 s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; in __QSAX()
387 return ((uint32_t)((s << 16) | (r ))); in __QSAX()
398 q31_t r, s; in __SHSAX() local
400 r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; in __SHSAX()
401 s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; in __SHSAX()
403 return ((uint32_t)((s << 16) | (r ))); in __SHSAX()
414 return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - in __SMUSDX()
448 return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y))); in __QSUB()
488 return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - in __SMLSDX()
543 return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) - in __SMUSD()