Lines Matching +full:18 +full:- +full:110
5 * SPDX-License-Identifier: Apache-2.0
7 * This is not exhaustive functional testing of the CMSIS-NN library.
10 * validate the integration of CMSIS-NN and Zephyr
27 #define AVGPOOLING_2_OUT_ACTIVATION_MIN -128
40 -82, -104, 10, -28, -52, -51, -66, 52, 124, -74, -21, 4, 37, -7, -33,
41 102, 110, 24, 52, 121, 13, -55, -79, -92, -35, -103, 86, 95, 46, 32,
42 -24, -123, 120, 29, -77, -97, -69, -68, 58, 38, 3, 3, 79, -47, 112,
43 -52, -113, -46, 107, 68, 83, -70, 91, 14, 113, 74, 73, -103, -98, 25};
46 -67, -85, 31, 48, -63, -51, -55, 33, 30, -53, 10, 16, 38, 56, 5,
47 31, 20, -6, -16, 18, 4, 47, 13, 2, 39, -38, -31, 45, -6, -27,
48 -75, -35, 49, 44, -2, -39, -63, 44, 13, 24, -49, -60, -12, 39, 73,
49 11, -60, 41, 25, 98, 35, -37, -19, 8, 69, 79, 2, -6, -42, 69};
102 #define CONV_4_OUT_ACTIVATION_MIN -109
114 #define CONV_4_OUTPUT_OFFSET -128
121 -25, -83, -74, 105, 30, 118, -32, 127, 34, 127, -112, 39, -43, 104, 41, -124, 115, 5,
122 42, -48, -119, 93, 17, 57, 41, -41, -42, 23, 127, 18, 70, -99, 71, 67, 83, 76,
123 -50, 98, 66, 64, 127, -6, -77, -48, -26, 45, 77, 1, 81, 27, 124, -103, 37, 36};
126 82, 120, -97, -44, -118, 73, 4, -84, -53, -122, -15, 77, 83, 43, 37,
127 85, -11, 103, 45, -69, -12, -8, 21, 6, -68, -83, -15, -99, 90, -62,
128 95, 62, -38, -32, -35, -105, -53, 70, 112, 14, -4, -33, -26, -93, -98,
129 22, -5, 22, -104, 57, -92, 30, -62, 0, -43, -82, 60, 99, -83, 32,
130 94, 49, 10, 112, -71, -27, -91, -79, 52, -92, -71, 86, -79, -15, -80,
131 -74, -4, 76, -119, 91, -23, -12, -111, -72, 26, 11, 64, 116, 38, 99,
132 125, 17, 6, -4, 46, 119, 113, -116, -125, 80, -57, 122, 75, 119, -117,
133 87, -121, -70, -75, -127, 16, -124, -110, 10, 71, 29, 27, 37, -24, 52,
134 28, -100, 86, -75, 117, -31, -115, -86, -122, 121, -96, -118, 32, 111, 25,
135 -90, -8, 110, 37, 35, 124, -123, 94, -122, -114, 37, 85, -36, 53, -40,
136 73, -99, 27, 10, 37, 41, 64, -97, -123, 75, 0, -107, -72, 58, -100,
137 17, 77, 114, 120, -83, -96, 75, -12, -27, 3, 35, 85, 4, 119, -20,
138 28, 99, 104, -78, -51, -82, -92, -40, -116, 35, -107, 39, 9, -120, -50,
139 -102, -114, 25, -77, 25, 7, 64, 110, 80, -93, -20, 34, 115, 75, 37,
140 47, 16, 6, -92, -25, 37, 69, 82, -61, -100, -85, -51, 6, -95, 58
145 const int32_t conv_4_output_shift[3] = {-9, -9, -9};
147 const int8_t conv_4_output_ref[36] = {-5, -39, -31, 20, -37, -26, -109, -7, -10, -51, -58, 48,
148 -100, -32, 24, 4, 69, -38, -64, 65, -34, 95, -55, 39,
149 95, -54, 27, -49, 25, -68, -109, -66, 72, 38, -44, -40};
241 #define STRIDE2PAD1_OUT_ACTIVATION_MIN -128
253 #define STRIDE2PAD1_OUTPUT_OFFSET -20
257 const int32_t stride2pad1_biases[1] = {-9794};
259 const int8_t stride2pad1_weights[9] = {-54, 57, -19, -127, 87, 70, 74, -110, 66};
262 -91, -30, -57, -76, 32, -13, 14, -96, 108, -4, 41, 48, 107, -68, -101, 30, 95,
263 95, 91, -66, -80, 114, -49, 7, -67, -35, -1, -88, -77, -56, -103, 5, -39, -118,
264 -24, -32, 67, 11, 38, -16, -124, 44, -46, -92, -24, 108, 80, -29, -3};
268 const int32_t stride2pad1_output_shift[1] = {-8};
270 const int8_t stride2pad1_output_ref[16] = {26, -11, 33, -25, -96, -52, -78, -86,
271 33, -2, -88, -113, -14, 0, -84, -27};
341 #define FULLY_CONNECTED_MVE_0_OUT_ACTIVATION_MIN -128
345 #define FULLY_CONNECTED_MVE_0_OUTPUT_SHIFT -9
348 #define FULLY_CONNECTED_MVE_0_OUTPUT_OFFSET -26
350 const int32_t fully_connected_mve_0_biases[9] = {11295, -30752, -3196, 10489, -5120,
353 const int8_t fully_connected_mve_0_input[16] = {-43, 68, 79, -12, -119, -56, -102, -46,
354 107, -65, -109, -7, 92, -99, -80, -29};
356 const int8_t fully_connected_mve_0_output_ref[9] = {-9, -3, 26, 8, 3, -88, 75, 34, 5};
359 37, -46, 75, -33, -52, -82, -94, 64, 71, 65, 64, 16, -66, -5, -65, -44,
360 82, 42, 84, 105, 18, 79, -103, -75, -95, 65, 87, 103, 43, -25, -66, 75,
361 125, 40, -34, 24, 9, -79, 4, 73, 98, -75, 42, 81, 18, -58, -119, 92,
362 0, -72, 48, 23, -69, 11, -95, -103, 66, 117, 107, -96, 114, -29, 75, -93,
363 118, 66, -19, 83, -14, 86, -110, 44, 37, -9, 17, -107, 50, -116, -116, -27,
364 -84, -126, -108, -127, -71, 8, 81, 108, -61, 126, 69, -45, 37, -78, -102, -55,
365 116, 112, -111, -89, -57, 82, -47, 22, 125, -84, 97, -9, 88, 74, -15, 118,
366 -95, 112, 89, 44, -17, -112, -71, -94, 1, -117, 112, -92, 52, 57, -22, 80,
367 -60, 95, -106, -1, -27, 105, 6, 123, 6, 96, 126, -65, -29, 103, 19, -45};
430 #define MAXPOOLING_2_OUT_ACTIVATION_MIN -128
443 75, -52, -42, -30, 56, 64, 106, -36, 120, -3, 34, -105, 69, 75, -39,
444 15, 93, -71, 39, 34, -11, 65, 22, 59, 106, 105, 45, -116, -75, 123,
445 -65, 75, -61, 13, -25, -123, 59, 110, -65, 86, -108, -107, -17, 38, 27,
446 -1, -115, -123, 75, -75, 68, 52, 12, -35, 116, -68, 22, 15, 76, -81};
449 75, 106, -36, 120, 56, 75, 106, 69, 120, 56, 64, 106, 69, 120, 34,
451 105, 75, 110, 13, 123, -65, 75, 110, 38, 86, -1, 59, 110, 75, 86,
498 #define SOFTMAX_DIFF_MIN -3968
501 const int8_t softmax_input[10] = {101, 49, 6, -34, -75, -79, -38, 120, -55, 115};
503 const int8_t softmax_output_ref[10] = {-57, -70, -79, -86, -92, -94, -88, -54, -91, -56};
523 #define SVDF_2_SHIFT_1 -3
524 #define SVDF_2_SHIFT_2 -11
525 #define SVDF_2_IN_ACTIVATION_MIN -32768
532 #define SVDF_2_OUT_ACTIVATION_MIN -128
545 27, 82, -108, -127, 85, 3, -51, 32, 110, -6, -14, -16, 31, 101,
546 -122, 19, 76, 74, -80, 12, -22, -17, 10, -28, 55, 109, 2, -107,
547 -4, 72, -65, -59, 36, -69, 105, -97, 25, 38, 110, -121, -88, -126,
548 -14, 16, -88, -66, 3, -93, 69, -64, 44, 103, 95, -95, 68, -46,
549 106, -31, -63, 23, -38, 36, -95, -43, 93, 77, 91, -26, 33, 59};
551 const int16_t svdf_2_weights_time[20] = {-31, -88, -10, -72, -119, -6, -70, 63, -10, 93,
552 5, 42, -6, 22, 6, 51, 37, -38, 5, 117};
555 29, 81, -38, 17, -116, 43, 119, -127, 74, 115, 9, 118, 7, -56,
556 -53, -14, -98, 60, -128, 10, 28, -18, 12, -28, -126, 87, -115, -44,
557 -123, -109, -59, -87, -69, 121, -128, -95, -70, 2, 81, -119, 84, -122};
559 const int8_t svdf_2_output_ref[15] = {-53, 45, 27, -24, -53, 26, -82, -38,
560 11, -85, 94, -16, -32, 31, 4};