32 uint8_t io_area[24] = {  variable
84 	io_area[PCH_SMBUS_HD0] = found->addr;  in peripheral_handle_smbalert()
97 			io_area[PCH_SMBUS_NDA] = peripheral->addr << 1;  in peripheral_handle_host_notify()
108 	uint8_t addr = PCH_SMBUS_TSA_ADDR_GET(io_area[PCH_SMBUS_TSA]);  in peripheral_write()
122 	uint8_t addr = PCH_SMBUS_TSA_ADDR_GET(io_area[PCH_SMBUS_TSA]);  in peripheral_read()
136 	uint8_t smbus_cmd = PCH_SMBUS_HCTL_CMD_GET(io_area[PCH_SMBUS_HCTL]);  in emul_start_smbus_protocol()
138 		(io_area[PCH_SMBUS_TSA] & PCH_SMBUS_TSA_RW) == SMBUS_MSG_WRITE;  in emul_start_smbus_protocol()
139 	uint8_t addr = PCH_SMBUS_TSA_ADDR_GET(io_area[PCH_SMBUS_TSA]);  in emul_start_smbus_protocol()
165 			peripheral_write(0, io_area[PCH_SMBUS_HCMD]);  in emul_start_smbus_protocol()
168 			peripheral_read(0, &io_area[PCH_SMBUS_HD0]);  in emul_start_smbus_protocol()
174 			peripheral_write(io_area[PCH_SMBUS_HCMD],  in emul_start_smbus_protocol()
175 					 io_area[PCH_SMBUS_HD0]);  in emul_start_smbus_protocol()
178 			peripheral_read(io_area[PCH_SMBUS_HCMD],  in emul_start_smbus_protocol()
179 					&io_area[PCH_SMBUS_HD0]);  in emul_start_smbus_protocol()
185 			peripheral_write(io_area[PCH_SMBUS_HCMD],  in emul_start_smbus_protocol()
186 					 io_area[PCH_SMBUS_HD0]);  in emul_start_smbus_protocol()
187 			peripheral_write(io_area[PCH_SMBUS_HCMD] + 1,  in emul_start_smbus_protocol()
188 					 io_area[PCH_SMBUS_HD1]);  in emul_start_smbus_protocol()
192 			peripheral_read(io_area[PCH_SMBUS_HCMD],  in emul_start_smbus_protocol()
193 					&io_area[PCH_SMBUS_HD0]);  in emul_start_smbus_protocol()
194 			peripheral_read(io_area[PCH_SMBUS_HCMD] + 1,  in emul_start_smbus_protocol()
195 					&io_area[PCH_SMBUS_HD1]);  in emul_start_smbus_protocol()
206 		peripheral_write(io_area[PCH_SMBUS_HCMD],  in emul_start_smbus_protocol()
207 				 io_area[PCH_SMBUS_HD0]);  in emul_start_smbus_protocol()
208 		peripheral_write(io_area[PCH_SMBUS_HCMD] + 1,  in emul_start_smbus_protocol()
209 				 io_area[PCH_SMBUS_HD1]);  in emul_start_smbus_protocol()
219 		peripheral_read(io_area[PCH_SMBUS_HCMD],  in emul_start_smbus_protocol()
220 				&io_area[PCH_SMBUS_HD1]);  in emul_start_smbus_protocol()
221 		peripheral_read(io_area[PCH_SMBUS_HCMD] + 1,  in emul_start_smbus_protocol()
222 				&io_area[PCH_SMBUS_HD0]);  in emul_start_smbus_protocol()
226 			uint8_t count = io_area[PCH_SMBUS_HD0];  in emul_start_smbus_protocol()
227 			uint8_t reg = io_area[PCH_SMBUS_HCMD];  in emul_start_smbus_protocol()
244 			uint8_t reg = io_area[PCH_SMBUS_HCMD];  in emul_start_smbus_protocol()
253 			io_area[PCH_SMBUS_HD0] = count;  in emul_start_smbus_protocol()
260 			uint8_t snd_count = io_area[PCH_SMBUS_HD0];  in emul_start_smbus_protocol()
261 			uint8_t reg = io_area[PCH_SMBUS_HCMD];  in emul_start_smbus_protocol()
292 			io_area[PCH_SMBUS_HD0] = rcv_count;  in emul_start_smbus_protocol()
301 	if (io_area[PCH_SMBUS_HCTL] & PCH_SMBUS_HCTL_INTR_EN) {  in emul_start_smbus_protocol()
313 			io_area[PCH_SMBUS_HCTL] = value & ~PCH_SMBUS_HCTL_START;  in emul_evaluate_write()
384 	io_area[addr] = value;  in emul_set_io()
389 	return io_area[addr];  in emul_get_io()
397 		io_area[addr] &= ~value;  in emul_out8()
401 		io_area[addr] &= ~value;  in emul_out8()
411 		io_area[addr] = value;  in emul_out8()
414 		io_area[addr] = value;  in emul_out8()
419 		io_area[addr]);  in emul_out8()
441 		value = io_area[addr];  in emul_in8()
444 		value = io_area[addr];  in emul_in8()