4  * SPDX-License-Identifier: Apache-2.0
38 	uint8_t offset;  member
51 	sys_slist_prepend(&peripherals, &peripheral->node);  in emul_register_smbus_peripheral()
59 		if (peripheral->addr == addr) {  in emul_get_smbus_peripheral()
72 		if (peripheral->smbalert && !peripheral->smbalert_handled) {  in peripheral_handle_smbalert()
82 	LOG_DBG("Return own address: 0x%02x", found->addr);  in peripheral_handle_smbalert()
84 	io_area[PCH_SMBUS_HD0] = found->addr;  in peripheral_handle_smbalert()
85 	found->smbalert_handled = true;  in peripheral_handle_smbalert()
95 		if (peripheral->host_notify) {  in peripheral_handle_host_notify()
97 			io_area[PCH_SMBUS_NDA] = peripheral->addr << 1;  in peripheral_handle_host_notify()
106 static void peripheral_write(uint8_t reg, uint8_t value)  in peripheral_write()  argument
113 		peripheral->raw_data[reg] = value;  in peripheral_write()
114 		LOG_DBG("peripheral: [0x%02x] <= 0x%02x", reg, value);  in peripheral_write()
120 static void peripheral_read(uint8_t reg, uint8_t *value)  in peripheral_read()  argument
127 		*value = peripheral->raw_data[reg];  in peripheral_read()
128 		LOG_DBG("peripheral: [0x%02x] => 0x%02x", reg, *value);  in peripheral_read()
227 			uint8_t reg = io_area[PCH_SMBUS_HCMD];  in emul_start_smbus_protocol()  local
236 				peripheral_write(reg++, e32.buf[i]);  in emul_start_smbus_protocol()
244 			uint8_t reg = io_area[PCH_SMBUS_HCMD];  in emul_start_smbus_protocol()  local
249 				peripheral_read(reg++, &e32.buf[i]);  in emul_start_smbus_protocol()
261 			uint8_t reg = io_area[PCH_SMBUS_HCMD];  in emul_start_smbus_protocol()  local
276 				peripheral_write(reg++, e32.buf[i]);  in emul_start_smbus_protocol()
285 				peripheral_read(--reg, &e32.buf[i]);  in emul_start_smbus_protocol()
288 			/* Clear offset count */  in emul_start_smbus_protocol()
289 			e32.offset = 0;  in emul_start_smbus_protocol()
323 static const char *pch_get_reg_name(uint8_t reg)  in pch_get_reg_name()  argument
325 	switch (reg) {  in pch_get_reg_name()
369 uint32_t emul_pci_read(unsigned int reg)  in emul_pci_read()  argument
371 	LOG_DBG("PCI [%x] => 0x%x", reg, pci_config_area[reg]);  in emul_pci_read()
372 	return pci_config_area[reg];  in emul_pci_read()
375 void emul_pci_write(pcie_bdf_t bdf, unsigned int reg, uint32_t value)  in emul_pci_write()  argument
377 	LOG_DBG("PCI [%x] <= 0x%x", reg, value);  in emul_pci_write()
378 	pci_config_area[reg] = value;  in emul_pci_write()
404 		/* Using internal E32 buffer offset */  in emul_out8()
405 		e32.buf[e32.offset++] = value;  in emul_out8()
434 		/* Using internal E32 buffer offset */  in emul_in8()
435 		value = e32.buf[e32.offset++];  in emul_in8()
438 		/* Clear e32 block buffer offset */  in emul_in8()
439 		e32.offset = 0;  in emul_in8()
440 		LOG_WRN("E32 buffer offset is cleared");  in emul_in8()