3  * SPDX-License-Identifier: Apache-2.0
9 /* pin configuration for test device */
17 	pinctrl_soc_pin_t pin;  in ZTEST()  local
19 	zassert_equal(pcfg->state_cnt, 1U);  in ZTEST()
21 	scfg = &pcfg->states[0];  in ZTEST()
23 	zassert_equal(scfg->id, PINCTRL_STATE_DEFAULT);  in ZTEST()
24 	zassert_equal(scfg->pin_cnt, 14U);  in ZTEST()
26 	pin = scfg->pins[0];  in ZTEST()
27 	zassert_equal(GD32_PORT_GET(pin), 0);  in ZTEST()
28 	zassert_equal(GD32_PIN_GET(pin), 0);  in ZTEST()
29 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_ANALOG);  in ZTEST()
30 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
32 	pin = scfg->pins[1];  in ZTEST()
33 	zassert_equal(GD32_PORT_GET(pin), 1);  in ZTEST()
34 	zassert_equal(GD32_PIN_GET(pin), 1);  in ZTEST()
35 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_ALTERNATE);  in ZTEST()
36 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
37 	zassert_equal(GD32_OSPEED_GET(pin), GD32_OSPEED_2MHZ);  in ZTEST()
39 	pin = scfg->pins[2];  in ZTEST()
40 	zassert_equal(GD32_PORT_GET(pin), 2);  in ZTEST()
41 	zassert_equal(GD32_PIN_GET(pin), 2);  in ZTEST()
42 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_GPIO_IN);  in ZTEST()
43 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
44 	zassert_equal(GD32_PUPD_GET(pin), GD32_PUPD_NONE);  in ZTEST()
45 	zassert_equal(GD32_OTYPE_GET(pin), GD32_OTYPE_PP);  in ZTEST()
47 	pin = scfg->pins[3];  in ZTEST()
48 	zassert_equal(GD32_PORT_GET(pin), 0);  in ZTEST()
49 	zassert_equal(GD32_PIN_GET(pin), 3);  in ZTEST()
50 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_GPIO_IN);  in ZTEST()
51 	zassert_equal(GD32_REMAP_REG_GET(GD32_REMAP_GET(pin)), 0);  in ZTEST()
52 	zassert_equal(GD32_REMAP_POS_GET(GD32_REMAP_GET(pin)), 0);  in ZTEST()
53 	zassert_equal(GD32_REMAP_MSK_GET(GD32_REMAP_GET(pin)), 0x1);  in ZTEST()
54 	zassert_equal(GD32_REMAP_VAL_GET(GD32_REMAP_GET(pin)), 1);  in ZTEST()
55 	zassert_equal(GD32_PUPD_GET(pin), GD32_PUPD_NONE);  in ZTEST()
56 	zassert_equal(GD32_OTYPE_GET(pin), GD32_OTYPE_PP);  in ZTEST()
58 	pin = scfg->pins[4];  in ZTEST()
59 	zassert_equal(GD32_PORT_GET(pin), 1);  in ZTEST()
60 	zassert_equal(GD32_PIN_GET(pin), 4);  in ZTEST()
61 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_ALTERNATE);  in ZTEST()
62 	zassert_equal(GD32_REMAP_REG_GET(GD32_REMAP_GET(pin)), 0);  in ZTEST()
63 	zassert_equal(GD32_REMAP_POS_GET(GD32_REMAP_GET(pin)), 0);  in ZTEST()
64 	zassert_equal(GD32_REMAP_MSK_GET(GD32_REMAP_GET(pin)), 0x1);  in ZTEST()
65 	zassert_equal(GD32_REMAP_VAL_GET(GD32_REMAP_GET(pin)), 1);  in ZTEST()
66 	zassert_equal(GD32_OSPEED_GET(pin), GD32_OSPEED_2MHZ);  in ZTEST()
68 	pin = scfg->pins[5];  in ZTEST()
69 	zassert_equal(GD32_PORT_GET(pin), 2);  in ZTEST()
70 	zassert_equal(GD32_PIN_GET(pin), 5);  in ZTEST()
71 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_GPIO_IN);  in ZTEST()
72 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
73 	zassert_equal(GD32_PUPD_GET(pin), GD32_PUPD_NONE);  in ZTEST()
74 	zassert_equal(GD32_OTYPE_GET(pin), GD32_OTYPE_PP);  in ZTEST()
76 	pin = scfg->pins[6];  in ZTEST()
77 	zassert_equal(GD32_PORT_GET(pin), 0);  in ZTEST()
78 	zassert_equal(GD32_PIN_GET(pin), 6);  in ZTEST()
79 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_GPIO_IN);  in ZTEST()
80 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
81 	zassert_equal(GD32_PUPD_GET(pin), GD32_PUPD_NONE);  in ZTEST()
82 	zassert_equal(GD32_OTYPE_GET(pin), GD32_OTYPE_OD);  in ZTEST()
84 	pin = scfg->pins[7];  in ZTEST()
85 	zassert_equal(GD32_PORT_GET(pin), 1);  in ZTEST()
86 	zassert_equal(GD32_PIN_GET(pin), 7);  in ZTEST()
87 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_GPIO_IN);  in ZTEST()
88 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
89 	zassert_equal(GD32_PUPD_GET(pin), GD32_PUPD_NONE);  in ZTEST()
90 	zassert_equal(GD32_OTYPE_GET(pin), GD32_OTYPE_PP);  in ZTEST()
92 	pin = scfg->pins[8];  in ZTEST()
93 	zassert_equal(GD32_PORT_GET(pin), 2);  in ZTEST()
94 	zassert_equal(GD32_PIN_GET(pin), 8);  in ZTEST()
95 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_GPIO_IN);  in ZTEST()
96 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
97 	zassert_equal(GD32_PUPD_GET(pin), GD32_PUPD_PULLUP);  in ZTEST()
98 	zassert_equal(GD32_OTYPE_GET(pin), GD32_OTYPE_PP);  in ZTEST()
100 	pin = scfg->pins[9];  in ZTEST()
101 	zassert_equal(GD32_PORT_GET(pin), 0);  in ZTEST()
102 	zassert_equal(GD32_PIN_GET(pin), 9);  in ZTEST()
103 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_GPIO_IN);  in ZTEST()
104 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
105 	zassert_equal(GD32_PUPD_GET(pin), GD32_PUPD_PULLDOWN);  in ZTEST()
106 	zassert_equal(GD32_OTYPE_GET(pin), GD32_OTYPE_PP);  in ZTEST()
108 	pin = scfg->pins[10];  in ZTEST()
109 	zassert_equal(GD32_PORT_GET(pin), 1);  in ZTEST()
110 	zassert_equal(GD32_PIN_GET(pin), 10);  in ZTEST()
111 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_ALTERNATE);  in ZTEST()
112 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
113 	zassert_equal(GD32_OSPEED_GET(pin), GD32_OSPEED_2MHZ);  in ZTEST()
115 	pin = scfg->pins[11];  in ZTEST()
116 	zassert_equal(GD32_PORT_GET(pin), 2);  in ZTEST()
117 	zassert_equal(GD32_PIN_GET(pin), 11);  in ZTEST()
118 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_ALTERNATE);  in ZTEST()
119 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
120 	zassert_equal(GD32_OSPEED_GET(pin), GD32_OSPEED_10MHZ);  in ZTEST()
122 	pin = scfg->pins[12];  in ZTEST()
123 	zassert_equal(GD32_PORT_GET(pin), 0);  in ZTEST()
124 	zassert_equal(GD32_PIN_GET(pin), 12);  in ZTEST()
125 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_ALTERNATE);  in ZTEST()
126 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
127 	zassert_equal(GD32_OSPEED_GET(pin), GD32_OSPEED_50MHZ);  in ZTEST()
129 	pin = scfg->pins[13];  in ZTEST()
130 	zassert_equal(GD32_PORT_GET(pin), 1);  in ZTEST()
131 	zassert_equal(GD32_PIN_GET(pin), 13);  in ZTEST()
132 	zassert_equal(GD32_MODE_GET(pin), GD32_MODE_ALTERNATE);  in ZTEST()
133 	zassert_equal(GD32_REMAP_GET(pin), GD32_NORMP);  in ZTEST()
134 	zassert_equal(GD32_OSPEED_GET(pin), GD32_OSPEED_MAX);  in ZTEST()