Lines Matching +full:child +full:- +full:prop +full:- +full:2

4  * SPDX-License-Identifier: Apache-2.0
37 #define MIO_PIN_L1_SEL_MASK       BIT(2)
110 #define MIO2   2
163 /* MIO pin groups (from Xilinx UG585 v1.13, table 2-4 "MIO-at-a-Glance") */
168 #define MIO_GROUP_QSPI0_0_GRP_PINS          1,  2,  3,  4,  5,  6
216 #define MIO_GROUP_SMC0_NAND_PINS            0,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, \
299 #define MIO_GROUP_GPIO0_2_GRP_PINS          2
360 /* Iterate over each pinctrl-n phandle child */
361 #define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)			\  argument
362 	{DT_FOREACH_CHILD(DT_PHANDLE(node_id, prop),			\
366  * If child has groups property:
367  *   - Iterate over each pin in group and populate pinctrl_soc_pin_t
368  * If child has pins property:
369  *   - Iterate over each pin in pins and populate pinctrl_soc_pin_t
380 #define Z_PINCTRL_STATE_PIN_CHILD_GROUP_INIT(node_id, prop, idx)	\  argument
383 				  DT_STRING_UPPER_TOKEN_BY_IDX(node_id, prop, idx)), _PINS))
390 #define Z_PINCTRL_STATE_PIN_CHILD_PIN_INIT(node_id, prop, idx)		\  argument
391 	Z_PINCTRL_STATE_PIN_INIT(node_id, DT_STRING_UPPER_TOKEN_BY_IDX(node_id, prop, idx))