Lines Matching +full:extra +full:- +full:byte

2  * Copyright (c) 2013-2014 Wind River Systems, Inc.
3  * Copyright (c) 2016-2017 Jean-Paul Etienne <fractalclone@gmail.com>
9  * - include/arch/arm/cortex_m/scripts/linker.ld
10  * - include/arch/riscv/common/linker.ld
11  * - include/arch/riscv/pulpino/linker.ld
13  * SPDX-License-Identifier: Apache-2.0
19 #include <zephyr/linker/linker-defs.h>
20 #include <zephyr/linker/linker-tool.h>
25  * Extra efforts would need to be taken to ensure the IRQ handlers are within
26  * jumping distance of the vector table in non-XIP builds, so avoid them.
79         #include <zephyr/linker/rel-sections.ld>
82         #include <zephyr/linker/llext-sections.ld>
107                 #include <snippets-rom-start.ld>
122                 #include <zephyr/linker/common-rom.ld>
123                 #include <zephyr/linker/thread-local-storage.ld>
137                     #include <snippets-rodata.ld>
141                 #include <zephyr/linker/cplusplus-rom.ld>
161         /* https://groups.google.com/a/groups.riscv.org/d/msg/sw-dev/60IdaZj27dY/TKT3hbNlAgAJ */
168         #include <snippets-rwdata.ld>
173 	    __data_size = __data_end - __data_start;
178             #include <zephyr/linker/common-ram.ld>
179             #include <zephyr/linker/cplusplus-ram.ld>
184             #include <snippets-data-sections.ld>
192          * For performance, BSS section is assumed to be 4 byte aligned and
202          /* Ensure 4 byte alignment for the entire section. */
210          * This section is used for non-initialized objects that
218         #include <snippets-noinit.ld>
225         #include <snippets-ram-sections.ld>
230         #include <snippets-sections.ld>
232         #include <zephyr/linker/ram-end.ld>
237         /* Bogus section, post-processed during the build to initialize interrupts. */
241         #include <zephyr/linker/debug-sections.ld>