Lines Matching +full:- +full:j
4 * SPDX-License-Identifier: Apache-2.0
17 * Interrupts work the same way for both the RI5CY and ZERO-RISCY cores
27 * Note: Per RV32I restrictions, "j SOME_HANDLER" can jump within a +/- 1MiB
29 * and ZERO-RISCY is allocated 256 KiB, and these flash banks contain the
36 j _isr_wrapper /* IRQ 0 */
37 j _isr_wrapper /* IRQ 1 */
38 j _isr_wrapper /* IRQ 2 */
39 j _isr_wrapper /* IRQ 3 */
40 j _isr_wrapper /* IRQ 4 */
41 j _isr_wrapper /* IRQ 5 */
42 j _isr_wrapper /* IRQ 6 */
43 j _isr_wrapper /* IRQ 7 */
44 j _isr_wrapper /* IRQ 8 */
45 j _isr_wrapper /* IRQ 9 */
46 j _isr_wrapper /* IRQ 10 */
47 j _isr_wrapper /* IRQ 11 */
48 j _isr_wrapper /* IRQ 12 */
49 j _isr_wrapper /* IRQ 13 */
50 j _isr_wrapper /* IRQ 14 */
51 j _isr_wrapper /* IRQ 15 */
52 j _isr_wrapper /* IRQ 16 */
53 j _isr_wrapper /* IRQ 17 */
54 j _isr_wrapper /* IRQ 18 */
55 j _isr_wrapper /* IRQ 19 */
56 j _isr_wrapper /* IRQ 20 */
57 j _isr_wrapper /* IRQ 21 */
58 j _isr_wrapper /* IRQ 22 */
59 j _isr_wrapper /* IRQ 23 */
60 j _isr_wrapper /* IRQ 24 */
61 j _isr_wrapper /* IRQ 25 */
62 j _isr_wrapper /* IRQ 26 */
63 j _isr_wrapper /* IRQ 27 */
64 j _isr_wrapper /* IRQ 28 */
65 j _isr_wrapper /* IRQ 29 */
66 j _isr_wrapper /* IRQ 30 */
67 j _isr_wrapper /* IRQ 31 */
70 j __start /* reset */
71 j _isr_wrapper /* illegal instruction */
72 j _isr_wrapper /* ecall */
73 j _isr_wrapper /* load store eunit error */